A.3 DL reference measurement channels

38.101-13GPPNRPart 1: Range 1 StandaloneRelease 17TSUser Equipment (UE) radio transmission and reception

A.3.1 General

Unless otherwise stated, Tables A.3.2.2-1, A.3.2.2-2, A.3.2.2-3, A.3.3.2-1, A.3.3.2-2 and A.3.3.2-3 are applicable for measurements of the Receiver Characteristics (clause 7) with the exception of clauses 7.4 (Maximum input level).

Unless otherwise stated, Tables A.3.2.3-1, A.3.2.3-2, A.3.2.3-3, A.3.3.3-1, A.3.3.3-2 and A.3.3.3-3 are applicable for clauses 7.4 (Maximum input level) and for UE not supporting PDSCH 256QAM,

Unless otherwise stated, Tables A.3.2.4-1, A.3.2.4-2, A.3.2.4-3, A.3.3.4-1, A.3.3.4-2 and A.3.3.4-3 are applicable for clauses 7.4 (Maximum input level) and for UE supporting PDSCH 256QAM,

Unless otherwise stated, Tables A.3.2.2-1, A.3.2.2-2, A.3.2.2-3, A.3.3.2-1, A.3.3.2-2 and A.3.3.2-3 also apply for the modulated interferer used in Clauses 7.5, 7.6 and 7.8 with test specific bandwidths.

Table A.3.1-1. Common reference channel parameters

Parameter

Unit

Value

CORESET frequency domain allocation

Full BW

CORESET time domain allocation

2 OFDM symbols at the begin of each slot

PDSCH mapping type

Type A

PDSCH start symbol index (S)

2

Number of consecutive PDSCH symbols (L)

12

PDSCH PRB bundling

PRBs

2

Dynamic PRB bundling

false

Overhead value for TBS determination

0

First DMRS position for Type A PDSCH mapping

2

DMRS type

Type 1

Number of additional DMRS

2

FDM between DMRS and PDSCH

Disable

CSI‑RS for tracking

First subcarrier index in the PRB used for CSI-RS (k0)

0 for CSI-RS resource 1,2,3,4

OFDM symbols in the PRB used for CSI‑RS

l0 = 6 for CSI-RS resource 1 and 3

l0 = 10 for CSI-RS resource 2 and 4

Number of CSI-RS ports

1 for CSI-RS resource 1,2,3,4

CDM Type

‘No CDM’ for CSI-RS resource 1,2,3,4

Density (ρ)

3 for CSI-RS resource 1,2,3,4

CSI‑RS periodicity

Slots

15 kHz SCS: 20 for CSI-RS resource 1,2,3,4

30 kHz SCS: 40 for CSI-RS resource 1,2,3,4

60 kHz SCS: 80 for CSI-RS resource 1,2,3,4

CSI‑RS offset

Slots

15 kHz SCS:

0 for CSI-RS resource 1 and 2

1 for CSI-RS resource 3 and 4

30 kHz SCS:

1 for CSI-RS resource 1 and 2

2 for CSI-RS resource 3 and 4

60 kHz SCS:

2 for CSI-RS resource 1 and 2

3 for CSI-RS resource 3 and 4

Frequency Occupation

Start PRB 0

Number of PRB = BWP size

QCL info

TCI state #0

PTRS configuration

PTRS is not configured

A.3.2 DL reference measurement channels for FDD

A.3.2.1 General

Table A.3.2.1-1 Additional reference channels parameters for FDD

Parameter

Unit

Value

Number of HARQ Processes

4

K1 value

2 for all slots

A.3.2.2 FRC for receiver requirements for QPSK

Table A.3.2.2-1 Fixed reference channel for receiver requirements (SCS 15 kHz, FDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

8

8

8

8

8

8

8

8

MCS Index

4

4

4

4

4

4

4

4

MCS Table for TBS determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

1672

3368

5120

6912

8712

10504

14088

17424

Transport block CRC

Bits

16

16

24

24

24

24

24

24

LDPC base graph

2

2

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

1

1

1

1

2

2

2

3

Binary Channel Bits per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

5400

11232

17064

22896

28728

34560

46656

58320

Max. Throughput averaged over 1 frame

Mbps

1.338

2.694

4.096

5.530

6.970

8.403

11.270

13.9392

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.2-2 Fixed reference channel for receiver requirements (SCS 30 kHz, FDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

80

90

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

217

245

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

17

17

17

17

17

17

17

17

17

17

17

17

MCS Index

4

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

736

1608

2472

3368

4224

4992

6912

8712

10504

14088

15880

17928

Transport block CRC

Bits

16

16

16

16

24

24

24

24

24

24

24

24

LDPC base graph

2

2

2

2

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

2376

5184

8208

11016

14040

16848

22896

28728

34992

46872

52920

58968

Max. Throughput averaged over 1 frame

Mbps

1.251

2.734

4.202

5.726

7.181

8.486

11.750

14.810

17.857

23.950

26.996

30.478

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.2-3 Fixed reference channel for receiver requirements (SCS 60 kHz, FDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

90

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

107

121

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

36

36

36

36

36

36

36

36

36

36

36

MCS Index

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS Determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

736

1192

1608

2024

2472

3368

4224

5120

6912

7808

8712

Transport block CRC

Bits

16

16

16

16

16

16

24

24

24

24

24

LDPC base graph

2

2

2

2

2

2

1

1

1

1

1

Number of Code Blocks per Slot

For Slot 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

CBs

1

1

1

1

1

1

1

1

1

1

2

Binary Channel Bits per Slot

For Slot 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

2376

3888

5184

6696

8208

11016

14040

17064

23112

26136

29160

Max. Throughput averaged over 1 frame

Mbps

2.650

4.291

5.789

7.286

8.899

12.125

15.206

18.432

24.883

28.109

31.363

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.2.3 FRC for maximum input level for 64QAM

Table A.3.2.3-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, FDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

8

8

8

8

8

8

8

8

MCS Index

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

12296

25608

38936

52224

64552

77896

106576

131176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slot 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

2

4

5

7

8

10

13

16

Binary Channel Bits per Slot

For Slot 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

16200

33696

51192

68688

86184

103680

139968

174960

Max. Throughput averaged over 1 frame

Mbps

9.837

20.486

31.149

41.779

51.642

62.317

85.261

104.941

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.3-2 Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, FDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

17

17

17

17

17

17

17

17

17

17

17

MCS Index

24

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

5376

11784

18432

25104

31752

37896

52224

64552

79896

106576

135296

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slot2 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

CBs

1

2

3

3

4

5

7

8

10

13

17

Binary Channel Bits per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

7128

15552

24624

33048

42120

50544

68688

86184

104976

140616

176904

Max. Throughput averaged over 1 frame

Mbps

9.139

20.033

31.334

42.677

53.978

64.423

88.781

109.738

135.823

181.179

230.003

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.3-3 Fixed Reference Channel for Maximum input level receiver requirements (SCS 60 kHz, FDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

36

36

36

36

36

36

36

36

36

36

MCS Index

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

5376

8712

11784

15112

18432

25104

31752

38936

52224

65576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

CBs

1

2

2

2

3

3

4

5

7

8

Binary Channel Bits per Slot

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

7128

11664

15552

20088

24624

33048

42120

51192

69336

87480

Max. Throughput averaged over 1 frame

Mbps

19.354

31.363

42.422

54.403

66.355

90.374

114.307

140.170

188.006

236.074

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.2.4 FRC for maximum input level for 256 QAM

Table A.3.2.4-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, FDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

8

8

8

8

8

8

8

8

MCS Index

23

23

23

23

23

23

23

23

MCS Table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

16896

34816

53288

71688

90176

108552

143400

180376

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slot 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

3

5

7

9

12

14

18

23

Binary Channel Bits per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

21600

44928

68256

91584

114912

138240

186624

233280

Max. Throughput averaged over 1 frame

Mbps

13.517

27.853

42.630

57.350

72.141

86.842

114.720

144.310

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.4-2 Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, FDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

17

17

17

17

17

17

17

17

17

17

17

MCS Index

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

7424

16136

25608

33816

44040

52224

71688

90176

108552

147576

184424

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

CBs

1

3

4

5

6

7

9

12

14

19

23

Binary Channel Bits per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

9504

20736

32832

44064

56160

67392

91584

114912

139968

187488

235872

Max. Throughput averaged over 1 frame

Mbps

12.621

27.431

43.534

57.487

74.868

88.781

121.870

153.299

184.538

250.879

313.521

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.4-3 Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, FDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

36

36

36

36

36

36

36

36

36

36

MCS Index

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

7424

12040

16136

21000

25608

33816

44040

53288

71688

90176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

CBs

1

2

3

3

4

5

6

7

9

12

Binary Channel Bits per Slot

For Slot 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

9504

15552

20736

26784

32832

44064

56160

68256

92448

116640

Max. Throughput averaged over 1 frame

Mbps

26.726

43.344

58.090

75.600

92.189

121.738

158.544

191.837

258.077

324.634

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.2.5 FRC for maximum input level for 1024 QAM

Table A.3.2.5-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, FDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

8

8

8

8

8

8

8

8

MCS Index

23

23

23

23

23

23

23

23

MCS Table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

21000

44040

67584

90176

112648

135296

184424

229576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slot 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

3

6

9

11

14

17

22

28

Binary Channel Bits per Slot

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

27000

56160

85320

114480

143640

172800

233280

291600

Max. Throughput averaged over 1 frame

Mbps

16.800

35.232

54.067

72.141

90.118

108.237

147.539

183.661

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.5-2 Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, FDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

17

17

17

17

17

17

17

17

17

17

17

MCS Index

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

9224

20496

32264

43032

55304

65576

90176

112648

139376

184424

233608

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

CBs

2

3

4

6

7

8

11

14

17

22

28

Binary Channel Bits per Slot

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,…,19

Bits

11880

25920

41040

55080

70200

84240

114480

143640

174960

234360

294840

Max. Throughput averaged over 1 frame

Mbps

15.681

34.843

54.849

73.154

94.017

111.479

153.299

191.502

236.939

313.521

397.134

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.2.5-3 Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, FDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

36

36

36

36

36

36

36

36

36

36

MCS Index

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

9224

15368

20496

26120

32264

43032

55304

67584

90176

114776

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

CBs

2

2

3

4

4

6

7

9

11

14

Binary Channel Bits per Slot

For Slot 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,…,39

Bits

11880

19440

25920

33480

41040

55080

70200

85320

115560

145800

Max. Throughput averaged over 1 frame

Mbps

33.206

55.325

73.786

94.032

116.150

154.915

199.094

243.302

324.634

413.194

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.3 DL reference measurement channels for TDD

A.3.3.1 General

Table A.3.3.1-1 Additional reference channels parameters for TDD

Parameter

Value

SCS 15 kHz (µ=0)

SCS 30 kHz (µ=1)

SCS 60 kHz (µ=2)

TDD Slot Configuration pattern (Note 1)

DDDSU

7DS2U

14DS1S24U

Special Slot Configuration (Note 2)

10D+2G+2U

6D+4G+4U

S1=12D+2G, S2=6G+8U

referenceSubcarrierSpacing

15 kHz

30 kHz

60 kHz

UL-DL configuration

dl-UL-TransmissionPeriodicity

5 ms

5 ms

5 ms

nrofDownlinkSlots

3

7

14

nrofDownlinkSymbols

10

6

12

nrofUplinkSlot

1

2

4

nrofUplinkSymbols

2

4

8

Number of HARQ Processes

8

8

16

The number of slots between PDSCH and corresponding HARQ-ACK information (Note 3)

K1 = 4 if mod(i,5) = 0
K1 = 3 if mod(i,5) = 1
K1 = 2 if mod(i,5) = 2
where i is slot index per frame; i = {0,…,9}

K1 = 8 if mod(i,10) = 0
K1 = 7 if mod(i,10) = 1
K1 = 6 if mod(i,10) = 2
K1 = 5 if mod(i,10) = 3
K1 = 4 if mod(i,10) = 4
K1 = 3 if mod(i,10) = 5
K1 = 2 if mod(i,10) = 6
where i is slot index per frame; i = {0,…,19}

K1 = 13 if mod(i,20) = 2

K1 = 12 if mod(i,20) = 3

K1 = 11 if mod(i,20) = 4

K1 = 10 if mod(i,20) = 5

K1 = 9 if mod(i,20) = 6

K1 = 8 if mod(i,20) = 7

K1 = 7 if mod(i,20) = 8

K1 = 6 if mod(i,20) = 9
K1 = 6 if mod(i,20) = 10

K1 = 6 if mod(i,20) = 11

K1 = 6 if mod(i,20) = 12
K1 = 6 if mod(i,20) = 13
where i is slot index per frame; i = {0,…,39}

NOTE 1: D denotes a slot with all DL symbols; S denotes a slot with a mix of DL, UL and guard symbols; U denotes a slot with all UL symbols. The field is for information.

NOTE 2: D, G, U denote DL, guard and UL symbols, respectively. The field is for information.

NOTE 3: i is the slot index per frame.

A.3.3.2 FRC for receiver requirements for QPSK

Table A.3.3.2-1 Fixed reference channel for receiver requirements (SCS 15 kHz, TDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

4

4

4

4

4

4

4

4

MCS Index

4

4

4

4

4

4

4

4

MCS Table for TBS determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

1672

3368

5120

6912

8712

10504

14088

17424

Transport block CRC

Bits

16

16

24

24

24

24

24

24

LDPC base graph

2

2

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

1

1

1

1

2

2

2

3

Binary Channel Bits per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

5400

11232

17064

22896

28728

34560

46656

58320

Max. Throughput averaged over 1 frame

Mbps

0.669

1.347

2.048

2.765

3.485

4.202

5.635

6.970

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.2-2 Fixed reference channel for receiver requirements (SCS 30 kHz, TDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

162

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

4

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

736

1608

2472

3368

4224

4992

6912

8712

10504

12296

14088

17928

Transport block CRC

Bits

16

16

16

16

24

24

24

24

24

24

24

24

LDPC base graph

2

2

2

2

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

2376

5184

8208

11016

14040

16848

22896

28728

34992

40824

46872

58968

Max. Throughput averaged over 1 frame

Mbps

0.810

2.1.769

2.719

3.705

4.646

5.491

7.603

9.583

11.554

13.526

15.497

19.721

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.2-3 Fixed reference channel for receiver requirements (SCS 60 kHz, TDD, QPSK 1/3)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

93

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

24

24

24

24

24

24

24

24

26

24

24

MCS Index

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

64QAM

Modulation

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

736

1192

1608

2024

2472

3368

4224

5120

6016

6912

8712

Transport block CRC

Bits

16

16

16

16

16

16

24

24

24

24

24

LDPC base graph

2

2

2

2

2

2

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

CBs

1

1

1

1

1

1

1

1

1

1

2

Binary Channel Bits per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…,13} for i from {4,…,39}

Bits

2376

3888

5184

6696

8208

11016

14040

17064

20088

23112

29160

Max. Throughput averaged over 1 frame

Mbps

1.766

3.2.861

3.859

4.858

5.933

8.083

10.138

12.288

14.438

16.589

20.909

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.3.3 FRC for maximum input level for 64QAM

Table A.3.3.3-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, TDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

4

4

4

4

4

4

4

4

MCS Index

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

12296

25608

38936

52224

64552

77896

106576

131176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

2

4

5

7

8

10

13

16

Binary Channel Bits per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

16200

33696

51192

68688

86184

103680

139968

174960

Max. Throughput averaged over 1 frame

Mbps

4.918

10.243

15.574

20.890

20.890

31.158

42.630

52.470

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.3-2 Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, TDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

189

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

24

24

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

5376

11784

18432

25104

31752

37896

52224

64552

79896

92200

106576

135296

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

CBs

1

2

3

3

4

5

7

8

10

11

13

17

Binary Channel Bits per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

7128

15552

24624

33048

42120

50544

68688

86184

104976

122472

140616

176904

Max. Throughput averaged over 1 frame

Mbps

5.914

12.962

20.275

27.614

34.927

41.686

57.446

71.007

87.886

101.42

117.234

148.826

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.3-3. Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, TDD, 64QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

93

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

24

24

24

24

24

24

24

24

26

24

24

MCS Index

24

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

64QAM

Modulation

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

5376

8712

11784

15112

18432

25104

31752

38936

45096

52224

65576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

CBs

1

2

2

2

3

3

4

5

6

7

8

Binary Channel Bits per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

7128

11664

15552

20088

24624

33048

42120

51192

60264

69336

87480

Max. Throughput averaged over 1 frame

Mbps

12.902

20.909

28.282

36.269

44.237

60.250

76.205

93.446

108.23

125.338

157.382

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.3.4 FRC for maximum input level for 256 QAM

Table A.3.3.4-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, TDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

4

4

4

4

4

4

4

4

MCS Index

23

23

23

23

23

23

23

23

MCS table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

16896

34816

53288

71688

90176

108552

143400

180376

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

3

5

7

9

12

14

18

23

Binary Channel Bits per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

21600

44928

68256

91584

114912

138240

186624

233280

Max. Throughput averaged over 1 frame

Mbps

6.758

13.926

21.315

28.675

36.070

43.421

57.360

72.150

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.4-2 Fixed Reference channel for maximum input level receiver requirements (SCS 30 kHz, TDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

189

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

23

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

7424

16136

25608

33816

44040

52224

71688

90176

108552

127080

147576

184424

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

9504

20736

32832

44064

56160

67392

91584

114912

139968

163296

187488

235872

Max. Throughput averaged over 1 frame

Mbps

8.166

17.750

28.169

37.198

48.444

57.446

78.857

99.194

119.407

139.788

162.334

202.866

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.4-3 Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, TDD, 256QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

93

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

24

24

24

24

24

24

24

24

26

24

24

MCS Index

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

256QAM

Modulation

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

7424

12040

16136

21000

25608

33816

44040

53288

62504

71688

90176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

CBs

1

2

3

3

4

5

6

7

8

9

12

Binary Channel Bits per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

9504

15552

20736

26784

32832

44064

56160

68256

80352

92448

116640

Max. Throughput averaged over 1 frame

Mbps

17.818

28.896

38.726

50.400

61.459

81.158

105.696

127.891

150.010

172.051

216.422

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

A.3.3.5 FRC for maximum input level for 1024 QAM

Table A.3.3.5-1 Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, TDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration

0

0

0

0

0

0

0

0

Allocated resource blocks

25

52

79

106

133

160

216

270

Subcarriers per resource block

12

12

12

12

12

12

12

12

Allocated slots per Frame

4

4

4

4

4

4

4

4

MCS Index

23

23

23

23

23

23

23

23

MCS table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

21000

44040

67584

90176

112648

135296

184424

229576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

3

6

9

11

14

17

22

28

Binary Channel Bits per Slot

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

27000

56160

85320

114480

143640

172800

233280

291600

Max. Throughput averaged over 1 frame

Mbps

8.400

17.616

27.034

36.070

45.059

54.118

73.770

91.830

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.5-2 Fixed Reference channel for maximum input level receiver requirements (SCS 30 kHz, TDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

5

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

11

24

38

51

65

78

106

133

162

189

217

273

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

23

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

9224

20496

32264

43032

55304

65576

90176

112648

139376

159800

184424

233608

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

CBs

2

3

4

6

7

8

11

14

17

19

22

28

Binary Channel Bits per Slot

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,…,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,…,19}

Bits

11880

25920

41040

55080

70200

84240

114480

143640

174960

204120

234360

294840

Max. Throughput averaged over 1 frame

Mbps

10.146

22.546

35.490

47.335

60.834

72.134

99.194

123.913

153.314

175.868

202.866

256.969

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

Table A.3.3.5-3 Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, TDD, 1024QAM)

Parameter

Unit

Value

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

11

18

24

31

38

51

65

79

93

107

135

Subcarriers per resource block

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

24

24

24

24

24

24

24

24

26

24

24

MCS Index

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

1024QAM

Modulation

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

1024 QAM

Target Coding Rate

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

0.78

Maximum number of HARQ transmissions

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

9224

15368

20496

26120

32264

43032

55304

67584

79896

90176

114776

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

CBs

2

2

3

4

4

6

7

9

10

11

14

Binary Channel Bits per Slot

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14,15,16,17,18,19} for i from {0,…,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,…, 13} for i from {4,…,39}

Bits

11880

19440

25920

33480

41040

55080

70200

85320

100440

115560

145800

Max. Throughput averaged over 1 frame

Mbps

22.138

36.883

49.190

62.688

77.434

103.277

132.730

162.202

191.750

216.422

275.462

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame