7 Timing and Signalling characteristics

25.1333GPPRelease 17Requirements for support of radio resource management (FDD)TS

7.1 UE Transmit Timing

7.1.1 Introduction

The UE shall have capability to follow the frame timing change of the connected Node B. The uplink DPCCH/DPDCH frame transmission takes place approximately T₀ chips after the reception of the first detected path (in time) of the corresponding downlink DPCCH/DPDCH or F-DPCH frame, from the reference cell. T₀ is defined in [2]. UE initial transmit timing accuracy, maximum amount of timing change in one adjustment, minimum and maximum adjustment rate are defined in the following requirements.

7.1.2 Requirements

The UE initial transmission timing error shall be less than or equal to ±1.5 Chips. This requirement applies at the first transmission on the DPCCH/DPDCH. The reference point for the UE initial transmit timing control requirement shall be the time when the first detected path (in time) of the corresponding downlink DPCCH/DPDCH or F-DPCH frame is received from the reference cell plus T₀ chips. T₀ is defined in [2].

When the UE is not in soft handover, the reference cell shall be the one the UE has in the active set. In case the UE is initially allocated in soft handover, the reference cell shall be the same cell as used for calculating the initial CFN as defined in [16].

The cell, which is selected as a reference cell, shall remain as a reference cell even if other cells are added to the active set. In case that the reference cell is removed from the active set the UE shall start adjusting its transmit timing no later than the time when the whole active set update message is available at the UE taking the RRC procedure delay into account.

When the UE has performed a timing-maintained intra- or inter-frequency hard handover and higher layers has indicated that the UE shall not perform any synchronisation procedure for timing maintained intra- or inter-frequency hard handover, or when the UE attempts to re establish all dedicated physical channel(s) after an inter-RAT, intra- or inter-frequency hard-handover failure [18], it shall resume UL transmission with the same transmit timing as used immediately before the handover attempt. After resuming transmission, transmit timing adjustment requirements defined in the remainder of this clause apply.

The UE shall be capable of changing the transmission timing according to the received downlink DPCCH/DPDCH or F-DPCH frame. When the transmission timing error between the UE and the reference cell exceeds ±1.5 chips the UE is required to adjust its timing to within ±1.5 chips.

All adjustments made to the UE timing shall follow these rules:

1) The maximum amount of the timing change in one adjustment shall be ¼ Chip.

2) The minimum adjustment rate shall be 233ns per second.

3) The maximum adjustment rate shall be ¼ chip per 200ms.

In particular, within any given 800*d ms period, the UE transmit timing shall not change in excess of ±d chip from the timing at the beginning of this 800*d ms period, where 0≤d≤1/4.

7.2 UE Receive – Transmit Time Difference

7.2.1 Introduction

The UE shall have the capability to be in soft handover with more than one cell. The downlink DPCH frame timing or the downlink F-DPCH frame timing shall take place approximately T₀ chips before the transmission of the uplink DPDCH/DPCCH. The adjustment requirements for the uplink DPDCH/DPCCH timing are specified in 7.1.1. The valid range of the Receive to Transmit time difference at the UE is defined in the following requirements.

7.2.2 Requirements

A UE shall support reception, demodulation and combining of signals of a downlink DPCH, or a downlink F-DPCH, when the receive timing is within a window of T₀ +/- 148 chip before the transmit timing where T₀ is defined in [2].

For downlink DPCH a UE is only required to react to TPC commands with a transmit power adjustment in the immediate next slot if the downlink receive timing of all cells in the active set is within a window of T₀ +/- 148 chip before the uplink transmit timing.

For downlink F-DPCH, a UE is only required to react to TPC commands with a transmit power adjustment in the immediate next slot after the end of the TPC command combining period as defined in [18] if the downlink receive timing of all cells in the active set is within a window of T₀ +/- 148 chip before the uplink transmit timing.

If the downlink receive timing of one or more cells in the active set is outside the window of T₀ +/- 148 chip, the UE may also react with a power adjustment one slot later. The receive timing is defined as the first detected path in time.

7.3 UE timer accuracy

7.3.1 Introduction

UE timers are used in different protocol entities to control the UE behaviour.

7.3.2 Requirements

For UE timers T3xx, T_barred, Treselection, Penalty_time, T_CRmax, T_CrmaxHyst [16], UE shall comply with the timer accuracies according to Table 7.1.

The requirements are only related to the actual timing measurements internally in the UE. They do not include the following:

– Inaccuracy in the start and stop conditions of a timer (e.g. UE reaction time to detect that start and stop conditions of a timer is fulfilled), or

– Inaccuracies due to restrictions in observability of start and stop conditions of a UE timer (e.g. TTI alignment when UE sends messages at timer expiry).

Table 7.1

Timer value [s]	Accuracy
timer value <4	± 0.1 s
timer value ≥4	± 2.5 %

7.4 PRACH Burst timing accuracy

7.4.1 Introduction

The UE shall have capability to transmit the PRACH burst according to the timing of the received access slot [18]. The PRACH burst timing accuracy is defined in the following requirement.

7.4.2 Requirements

The UE PRACH burst timing error shall be less than or equal to ± 3.5 Chips. The reference point shall be the expected timing calculated from the UE’s reference detected path of the P-CCPCH.