14 Timing Accuracy

25.1533GPPRelease 17TSUTRA repeater conformance testing (LCR TDD)

Tools: ARFCN - Frequency Conversion for 5G NR/LTE/UMTS/GSM

14.1 Definition and applicability

Timing Accuracy is the repeater synchronization accuracy with NodeB, it includes the downlink ramp on/off time and uplink ramp on/off time.

14.2 Minimum requirements

The downlink gain versus time should meet the mask specified in figure 14.1. The beginning and end point of downlink burst is calculated according to the trigger given by NodeB or LCR TDD signal generator.

8 chips

Rated Gain

Zero Gain

Downlink burst without GP

Figure 14.1: Downlink gain ON/OFF template

The uplink gain versus time should meet the mask specified in figure 14.2. The beginning and end point of uplink burst is calculated according to the trigger given by NodeB or LCR TDD signal generator.

8 chips

Rated Gain

Zero Gain

Uplink burst without GP

Figure 14.2: Uplink gain ON/OFF template

14.3 Test purpose

This test verifies the ability of the LCR TDD repeater to reduce its transmit power outside of the active part of the Tx time slot (burst without guard period) to values below specified limits. This ability is needed to minimize the interference for other users receiving on the same frequency.

14.4 Method of test

14.4.1 Initial conditions

1) Set-up the equipment as shown in annex A.

2) Connect the signal generator equipment to the Repeater input port.

3) Connect the signal analyser to the Repeater output port..

14.4.2 Procedure

1) Set the signal generator to transmit one signal according to table 14.1.

Table 14.1: Parameters of the transmitted signal for Timing Accuracy testing

Parameter	Value/description
TDD Duty Cycle	TS i; i = 0, 1, 2, 3, 4, 5, 6: transmit, if i is 0,4,5,6; receive, if i is UpPCH,1,2,3.
Time slots under test	TS4, TS5 and TS6
BS output power setting	PRAT
Number of DPCH in each time slot under test	8
Power of each DPCH	1/8 of Base Station output power

2) Measure the RRC filtered mean power of the LCR TDD repeater output signal chipwise (i.e. averaged over time intervals of one chip duration) over the transmit off power period starting 8 chips before the beginning point of uplink/downlink burst, and ending 8 chips after the end point of uplink/downlink burst.

14.5 Test Requirements

The Timing Accuracy measured according to subclause 14.4.2 shall not exceed the limits specified in the relevant figures of 14.1 and 14.2.

Annex A (normative):
Repeater measurement system set-up

Example of measurement system set-ups are attached below as an informative annex.