4.5 Coding for HS-DSCH

25.2123GPPMultiplexing and channel coding (FDD)Release 17TS

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Data arrives to the coding unit in form of a maximum of one transport block once every transmission time interval. The transmission time interval is 2 ms which is mapped to a radio sub-frame of 3 slots.

The following coding steps can be identified:

– add CRC to each transport block (see subclause 4.5.1);

– bit scrambling (see subclause 4.5.1A);

– code block segmentation (see subclause 4.5.2);

– channel coding (see subclause 4.5.3);

– hybrid ARQ (see subclause 4.5.4);

– physical channel segmentation (see subclause 4.5.5);

– interleaving for HS-DSCH (see subclause 4.5.6);

– constellation re-arrangement for 16QAM and 64QAM (see subclause 4.5.7);

– mapping to physical channels (see subclause 4.5.8).

The coding steps for HS-DSCH are shown in the figure below.

Figure 16: Coding chain for HS-DSCH

In the following the number of transport blocks and the number of transport channels is always one i.e. m=1, i=1. When referencing non HS-DSCH formulae which are used in correspondence with HS-DSCH formulae the convention is used that transport block subscripts may be omitted (e.g. X₁ may be written X).

4.5.1 CRC attachment for HS-DSCH

4.5.1.1 CRC attachment method 1 for HS-DSCH

CRC attachment method 1 for the HS-DSCH transport channel shall be done using the general method described in 4.2.1 above with the following specific parameters.

The CRC length shall always be L₁= 24 bits.

4.5.1.2 CRC attachment method 2 for HS-DSCH

CRC attachment method 2 for the HS-DSCH transport channel shall be done according to the following method.

From the sequence of bits a₁, a₂, a₃,…, a_A , where A is the size of the HS-DSCH transport block, a CRC of length L₁= 24 bits is calculated according to Clause 4.2.1.1 above. This gives a sequence of bits c_im1, c_im2, c_im3,…, c_im24 where

k=1,2,…,24

This sequence of bits is then masked with the UE Identity x_ue,1, x_ue,2, …, x_ue,16 and then appended to the sequence of bits a₁, a₂, a₃,…, a_A to form the sequence of bits b₁, b₂, b₃,…, b_B, where B = A + 24, and

b_k = a_k k=1,2,…,A

b_k = c_k-A k=A+1,…,A+8

b_k = (c_k-A + x_ue,_k-A-8) mod 2 k=A+9, …,A+24

4.5.1A Bit scrambling for HS-DSCH

The bits output from the HS-DSCH CRC attachment are scrambled in the bit scrambler. The bits input to the bit scrambler are denoted by , where B is the number of bits input to the HS-DSCH bit scrambler The bits after bit scrambling are denoted .

Bit scrambling is defined by the following relation:

k = 1,2,…,B

and results from the following operation:

-15 < γ< 1

γ= 1

where ,

k = 1,2,…,B.

4.5.2 Code block segmentation for HS-DSCH

Code block segmentation for the HS-DSCH transport channel shall be done with the general method described in 4.2.2.2 above with the following specific parameters.

There will be a maximum of one transport block, i=1. The bits d_im1, d_im2, d_im3,…d_imB input to the block are mapped to the bits x_i1, x_i2, x_i3,…x_iXi directly. It follows that X₁ = B. Note that the bits x referenced here refer only to the internals of the code block segmentation function. The output bits from the code block segmentation function are o_ir1, o_ir2, o_ir3,…o_irK.

The value of Z = 5114 for turbo coding shall be used.

4.5.3 Channel coding for HS-DSCH

Channel coding for the HS-DSCH transport channel shall be done with the general method described in 4.2.3 above with the following specific parameters.

There will be a maximum of one transport block, i=1. The rate 1/3 turbo coding shall be used.

4.5.4 Hybrid ARQ for HS-DSCH

The hybrid ARQ functionality matches the number of bits at the output of the channel coder to the total number of bits of the HS-PDSCH set to which the HS-DSCH is mapped. The hybrid ARQ functionality is controlled by the redundancy version (RV) parameters. The exact set of bits at the output of the hybrid ARQ functionality depends on the number of input bits, the number of output bits, and the RV parameters.

The hybrid ARQ functionality consists of two rate-matching stages and a virtual buffer as shown in the figure below.

The first rate matching stage matches the number of input bits to the virtual IR buffer, information about which is provided by higher layers. Note that, if the number of input bits does not exceed the virtual IR buffering capability, the first rate-matching stage is transparent.

The second rate matching stage matches the number of bits after first rate matching stage to the number of physical channel bits available in the HS-PDSCH set in the TTI.

Figure 17: HS-DSCH hybrid ARQ functionality

4.5.4.1 HARQ bit separation

The HARQ bit separation function shall be performed in the same way as bit separation for turbo encoded TrCHs with puncturing in 4.2.7.4.1 above.

4.5.4.2 HARQ First Rate Matching Stage

HARQ first stage rate matching for the HS-DSCH transport channel shall be done with the general method described in 4.2.7.2.2.3 above with the following specific parameters.

The maximum number of soft channel bits available in the virtual IR buffer is N_IR which is signalled from higher layers for each HARQ process. The number of coded bits in a TTI before rate matching is N^TTI this is deduced from information signalled from higher layers and parameters signalled on the HS-SCCH for each TTI. Note that HARQ processing and physical layer storage occurs independently for each HARQ process currently active.

If N_IR is greater than or equal to N^TTI (i.e. all coded bits of the corresponding TTI can be stored) the first rate matching stage shall be transparent. This can, for example, be achieved by setting e_minus = 0. Note that no repetition is performed.

If N_IR is smaller than N^TTI the parity bit streams are punctured as in 4.2.7.2.2.3 above by setting the rate matching parameter where the subscripts i and l refer to transport channel and transport format in the referenced sub-clause. Note the negative value is expected when the rate matching implements puncturing. Bits selected for puncturing which appear as  in the algorithm in 4.2.7 above shall be discarded and not counted in the totals for the streams through the virtual IR buffer.

4.5.4.3 HARQ Second Rate Matching Stage

HARQ second stage rate matching for the HS-DSCH transport channel shall be done with the general method described in 4.2.7.5 above with the following specific parameters. Bits selected for puncturing which appear as  in the algorithm in 4.2.7.5 above shall be discarded and are not counted in the streams towards the bit collection.

The parameters of the second rate matching stage depend on the value of the RV parameters s and r. The parameter s can take the value 0 or 1 to distinguish between transmissions that prioritise systematic bits (s = 1) and non systematic bits (s = 0). The parameter r (range 0 to r_max-1) changes the initial error variable e_ini in the case of puncturing. In case of repetition both parameters r and s change the initial error variable e_ini. The parameters X_i, e_plus and e_minus are calculated as per table 10 below.

Denote the number of bits before second rate matching as N_sys for the systematic bits, N_p1for the parity 1 bits, and N_p2 for the parity 2 bits, respectively. Denote the number of physical channels used for the HS-DSCH by P. N_data is the number of bits available to the HS-DSCH in one TTI and defined as N_data=P3N_data₁, where N_data1 is defined in [2]. The rate matching parameters are determined as follows.

For , puncturing is performed in the second rate matching stage. The number of transmitted systematic bits in a transmission is for a transmission that prioritises systematic bits and for a transmission that prioritises non systematic bits.

For repetition is performed in the second rate matching stage. A similar repetition rate in all bit streams is achieved by setting the number of transmitted systematic bits to .

The number of parity bits in a transmission is: and for the parity 1 and parity 2 bits, respectively.

Table 10 below summarizes the resulting parameter choice for the second rate matching stage.

Table 10: Parameters for HARQ second rate matching

	X_i	e_plus	e_minus
Systematic RM S
Parity 1 RM P1_2
Parity 2 RM P2_2

The rate matching parameter e_ini is calculated for each bit stream according to the RV parameters r and s using

in the case of puncturing , i.e.,, and

for repetition, i.e., . Where and is the total number of redundancy versions allowed by varying as defined in 4.6.2. Note that r_max varies depending on the modulation mode, i.e. for 16QAM and 64QAM, r_max = 2 and for QPSK r_max = 4.

Note: For the modulo operation the following clarification is used: the value of (x mod y) is strictly in the range of 0 to y-1 (i.e. -1 mod 10 = 9).

4.5.4.4 HARQ bit collection

The HARQ bit collection is achieved using a rectangular interleaver of size .

The number of rows and columns are determined from:

for 64QAM, for 16QAM and for QPSK

where N_data is used as defined in 4.5.4.3.

Data is written into the interleaver column by column, and read out of the interleaver column by column starting from the first column.

N_t,sys is the number of transmitted systematic bits. Intermediate values N_r and N_c are calculated using:

and .

If N_c=0 and N_r> 0, the systematic bits are written into rows 1…N_r.

Otherwise systematic bits are written into rows 1…N_r+1 in the first N_c columns and, if N_r> 0, also into rows 1…N_r in the remaining N_col-N_c columns.

The remaining space is filled with parity bits. The parity bits are written column wise into the remaining rows of the respective columns. Parity 1 and 2 bits are written in alternating order, starting with a parity 2 bit in the first available column with the lowest index number.

In the case of 64QAM for each column the bits are read out of the interleaver in the order row 1, row 2, row 3, row 4, row 5, row 6. In the case of 16QAM for each column the bits are read out of the interleaver in the order row 1, row 2, row 3, row 4. In the case of QPSK for each column the bits are read out of the interleaver in the order row1, row2.

4.5.5 Physical channel segmentation for HS-DSCH

When more than one HS-PDSCH is used, physical channel segmentation divides the bits among the different physical channels. The bits input to the physical channel segmentation are denoted by w₁, w₂, w₃,…w_R, where R is the number of bits input to the physical channel segmentation block. The number of PhCHs is denoted by P.

The bits after physical channel segmentation are denoted , where p is PhCH number and U is the number of bits in one radio sub-frame for each HS-PDSCH, i.e. . The relation between w_k and u_p,k is given below.

For all modes, some bits of the input flow are mapped to each code until the number of bits on the code is U.

Bits on first PhCH after physical channel segmentation:

u_{1, k}= w_k k = 1, 2 , …, U

Bits on second PhCH after physical channel segmentation:

u_{2, k}= w_k+U k = 1, 2 , …, U

…

Bits on the P^th PhCH after physical channel segmentation:

u_P,k= w_k+(P-1)__U k = 1, 2 , …, U

4.5.6 Interleaving for HS-DSCH

The interleaving for FDD is done as shown in figure 18 below, separately for each physical channel. The bits input to the block interleaver are denoted by , where p is PhCH number and U is the number of bits in one TTI for one PhCH. For QPSK U = 960, for 16QAM U = 1920 and for 64QAM U = 2880. The basic interleaver is as the 2^nd interleaver described in Clause 4.2.11. The interleaver is of fixed size: R2=32 rows and C2=30 columns.

Figure 18: Interleaver structure for HS-DSCH

For 16QAM, there are two identical interleavers of the same fixed size R2×C2 = 32×30. The output bits from the physical channel segmentation are divided two by two between the interleavers: bits u_p,k and u_p,k+1 go to the first interleaver and bits u_p,k+2 and u_p,k+3 go to the second interleaver. Bits are collected two by two from the interleavers: bits v_p,k and v_p,k+1are obtained from the first interleaver and bits v_p,k+2 and v_p,k+3 are obtained from the second interleaver, where k mod 4=1.

For 64QAM, there are three identical interleavers of the same fixed size R2×C2 = 32×30. The output bits from the physical channel segmentation are divided two by two between the interleavers: bits u_p,k and u_p,k+1 go to the first interleaver, bits u_p,k+2 and u_p,k+3 go to the second interleaver and bits u_p,k+4 and u_p,k+5 go to the third interleaver. Bits are collected two by two from the interleavers: bits v_p,k and v_p,k+1are obtained from the first interleaver, bits v_p,k+2 and v_p,k+3 are obtained from the second interleaver and bits v_p,k+4 and v_p,k+5 are obtained from the third interleaver, where k mod 6=1.

4.5.7 Constellation re-arrangement for 16 QAM and 64QAM

This function only applies to 16QAM and 64QAM modulated bits. In case of QPSK it is transparent.

Table 11 describes the operations that produce the different rearrangements for 16QAM. The bits of the input sequence are mapped in groups of 4 so that v_p,k, v_p,k+1, v_p,k+2, v_p,k+3 are used, where k mod 4 = 1. The output bit sequences map to the output bits in groups of 4, i.e. r_p,k, r_p,k+1, r_p,k+2, r_p,k+3, where k mod 4 = 1.

Table 11: Constellation re-arrangement for 16QAM

constellation version parameter b	Output bit sequence	Operation
0		None
1		Swapping MSBs with LSBs
2		Inversion of the logical values of LSBs
3		Swapping MSBs with LSBs and inversion of logical values of LSBs

Table 11A describes the operations that produce the different rearrangements for 64QAM. The bits of the input sequence are mapped in groups of 6 so that v_p,k, v_p,k+1, v_p,k+2, v_p,k+3, v_p,k+4, v_p,k+5 are used, where k mod 6 = 1. The output bit sequences map to the output bits in groups of 6, i.e. r_p,k, r_p,k+1, r_p,k+2, r_p,k+3, r_p,k+4, r_p,k+5, where k mod 6 = 1.

Table 11A: Constellation re-arrangement for 64QAM

constellation version parameter b	Output bit sequence	Operation
0		None
1		Swapping MSBs and LSBs. Inversion of Middle SBs
2		Left circular shift of pair of SBs. Inversion of Middle SBs
3		Inversion of Middle SBs

4.5.8 Physical channel mapping for HS-DSCH

The HS-PDSCH is defined in [2]. The bits input to the physical channel mapping are denoted by r_p,1, r_p,2,…,r_p,U, where p is the physical channel number and U is the number of bits in one radio sub-frame for one HS-PDSCH. The bits r_p,k are mapped to the PhCHs so that the bits for each PhCH are transmitted over the air in ascending order with respect to k.