7 Timing relationship between physical channels

25.2113GPPPhysical channels and mapping of transport channels onto physical channels (FDD)Release 17TS

7.1 General

The P-CCPCH, on which the cell SFN is transmitted, is used as timing reference for all the physical channels, directly for downlink and indirectly for uplink.

Figure 29 describes the frame timing of some of the downlink physical channels; the timing of the remaining downlink physical channels and of the uplink physical channels is specified in the remaining subclauses. For the AICH the access slot timing is included. Transmission timing for uplink physical channels is given by the received timing of downlink physical channels.

Figure 29: Radio frame timing and access slot timing of downlink physical channels

The following applies:

– SCH (primary and secondary), CPICH (primary and secondary and demodulation CPICHs) and P-CCPCH have identical frame timings.

– The S-CCPCH timing may be different for different S-CCPCHs, but the offset from the P-CCPCH frame timing is a multiple of 256 chips, i.e. S-CCPCH,k = Tk  256 chip, Tk  {0, 1, …, 149}. For S-CCPCH carrying BCH Tk = 0. For MBSFN operations using slot formats 21 to 23 in table 18, the offset shall be set in accordance with S-CCPCH,k = 256 + Tk /10.  2560 chip.

– If the PICH is associated to the S-CCPCH, the PICH timing is PICH = 7680 chips prior to its corresponding S-CCPCH frame timing, i.e. the timing of the S-CCPCH carrying the PCH transport channel with the corresponding paging information, see also subclause 7.2. If the PICH is associated to the HS-SCCH, the PICH frame timing is the same as the HS-SCCH frame timing.

– AICH access slots #0 starts the same time as P-CCPCH frames with (SFN modulo 2) = 0. The AICH/PRACH timing is described in subclauses 7.3 and 7.4 respectively.

– The DPCH timing may be different for different DPCHs, but the offset from the P-CCPCH frame timing is a multiple of 256 chips, i.e. DPCH,n = Tn  256 chip, Tn  {0, 1, …, 149}. The DPCH (DPCCH/DPDCH) timing relation with uplink DPCCH/DPDCHs is described in subclause 7.6.

– The F-DPCH timing may be different for different F-DPCHs, but the offset from the P-CCPCH frame timing is a multiple of 256 chips, i.e. F-DPCH,p = Tp  256 chip, Tp  {0, 1, …, 149}. All F-DPCHs transmitted to a UE from the same HS-DSCH cell set have the same timing. The F-DPCH timing relation with uplink DPCCH/DPDCHs is described in subclause 7.6.

– In case dual-cell E-DCH is configured together with DPDCH, DPCH (associated with the primary uplink) and F-DPCH (associated with the secondary uplink) transmitted to a UE from the same HS-DSCH cell set have the same timing.

– In the case that DPCCH2 is configured, the F-DPCH associated with the uplink DPCCH2 has the same timing as DPCH or F-DPCH associated with the uplink DPCCH.

– The start of HS-SCCH subframe #0 is aligned with the start of the P-CCPCH frames. The relative timing between a HS-PDSCH and the corresponding HS-SCCH is described in subclause 7.8.

– The E-HICH, E-RGCH, E-AGCH and E-ROCH downlink timing are respectively specified in subclause 7.10, 7.11, 7.12 and 7.12A. The E‑DPCCH and E‑DPDCH uplink timing are specified in subclause 7.13.

– For a secondary serving HS-DSCH cell, the nominal radio frame timing for CPICH and timing reference are the same as the radio frame timing for CPICH and timing reference for the serving HS-DSCH cell.

– The F-TPICH timing may be different for different F-TPICHs, but the offset from the P-CCPCH frame timing is a multiple of 256 chips, i.e. F-TPICH,m = Tm  256 chip, Tm  {0, 1, …, 149}.

7.2 PICH/S-CCPCH timing relation

Figure 30 illustrates the timing between a PICH frame and its associated single S-CCPCH frame, i.e. the S-CCPCH frame that carries the paging information related to the paging indicators in the PICH frame. A paging indicator set in a PICH frame means that the paging message is transmitted on the PCH in the S-CCPCH frame starting PICH chips after the transmitted PICH frame. PICH is defined in subclause 7.1.

Figure 30: Timing relation between PICH frame and associated S-CCPCH frame

7.2A PICH/HS-SCCH timing relation

Figure 30a illustrates the timing between a PICH frame and its set of 5 associated HS-SCCH subframes. The first associated subframe of the associated HS-SCCH starts one HS-SCCH sub-frame after the transmitted PICH frame and is the HS-SCCH subframe number 1 as defined in subclause 7.1. A paging indicator set in a PICH frame means that one or more HS-DSCH subframes may be transmitted to the UE on the HS-PDSCH(s) associated with the HS-SCCH subframes associated with the PICH as defined in [5].

Figure 30a: Timing relation between PICH frame and associated HS-SCCH subframes

7.3 PRACH/AICH timing relation

The downlink AICH is divided into downlink access slots, each access slot is of length 5120 chips. The downlink access slots are time aligned with the P-CCPCH as described in subclause 7.1.

The uplink PRACH is divided into uplink access slots, each access slot is of length 5120 chips. Uplink access slot number n is transmitted from the UE p-a chips prior to the reception of downlink access slot number n, n = 0, 1, …, 14.

Transmission of downlink acquisition indicators may only start at the beginning of a downlink access slot. Similarly, transmission of uplink RACH preambles and RACH message parts may only start at the beginning of an uplink access slot.

The PRACH/AICH timing relation is shown in figure 31.

Figure 31: Timing relation between PRACH and AICH as seen at the UE

The preamble-to-preamble distance p-p shall be larger than or equal to the minimum preamble-to-preamble distance
p-p,min, i.e. p-p  p-p,min.

In addition to p-p,min, the preamble-to-AI distance p-a and preamble-to-message distance p-m are defined as follows:

– when AICH_Transmission_Timing is set to 0, then

p-p,min = 15360 chips (3 access slots)

p-a = 7680 chips

p-m = 15360 chips (3 access slots)

– when AICH_Transmission_Timing is set to 1, then

p-p,min = 20480 chips (4 access slots)

p-a = 12800 chips

p-m = 20480 chips (4 access slots)

The parameter AICH_Transmission_Timing is signalled by higher layers.

7.3A UL/DL timing relation for Enhanced Uplink in CELL_FACH state and IDLE mode

Figure 31A: UL/DL timing relation for Enhanced Uplink in CELL_FACH state and IDLE mode as seen at the UE

The PRACH preamble and Acquisition indication timings p-p and p-a are as defined in section 7.3.

If Coffset is not configured by higher layers or the TTI length is 10ms, then

F-DPCH slot format number (according to Table 16C) = 0

F-DPCH = [(5120 * AICH access slot # with the AI) + 10240 + 256 * Soffset] mod 38400

a-m = 10240 + 256 * Soffset + 0 chips, where

Soffset = a symbol offset, configured by higher layers, {0,…,9}.

0 = 1024 chips defining the DL to UL frame timing difference.

If Coffset is configured by higher layers and the TTI length is 2ms, then

F-DPCH slot format number (according to Table 16C) = (Soffset – Coffset) mod 10

F-DPCH = [(5120 * AICH access slot # with the AI) + 10240 + 2560 * Toffset + 256 * Coffset] mod 38400

a-m = 10240 + 2560 * Toffset + 256 * Coffset + 0 chips, where

Coffset = a cell-specific symbol offset, configured by higher layers, {0, …, 29}

7.4 Void

7.5 Void

7.6 DPCCH/DPDCH timing relations

7.6.1 Uplink

In uplink all the DPCCHs and all the DPDCHs transmitted from one UE have the same frame timing.

7.6.2 Downlink

In downlink, the DPCCH and all the DPDCHs carrying CCTrCHs of dedicated type to one UE have the same frame timing.

Note: support of multiple CCTrChs of dedicated type is not part of the current release.

7.6.3 Uplink/downlink timing at UE

At the UE, the uplink DPCCH/DPDCH frame transmission takes place approximately T0 chips after the reception of the first detected path (in time) of the corresponding downlink DPCCH/DPDCH or F-DPCH frame. T0 is a constant defined to be 1024 chips. The first detected path (in time) is defined implicitly by the relevant tests in [14]. More information about the uplink/downlink timing relation and meaning of T0 can be found in [5].

7.7 Uplink DPCCH/HS-DPCCH/HS-PDSCH timing at the UE

7.7.1 Timing when Multiflow is not configured

Figure 34 shows the timing offset between the uplink DPCH, the HS-PDSCH and the HS-DPCCH at the UE. An HS-DPCCH sub-frame starts chips after the start of an uplink DPCH frame that corresponds to the DL DPCH or F-DPCH frame from the HS-DSCH serving cell containing the beginning of the related HS-PDSCH subframe with m calculated as

m = (TTX_diff /256 ) + 101

where TTX_diff is the difference in chips (TTX_diff =0, 256, ….., 38144), between

– the transmit timing of the start of the related HS-PDSCH subframe (see sub-clauses 7.8 and 7.1)

and

– the transmit timing of the start of the downlink DPCH or F-DPCH frame from the HS-DSCH serving cell that contains the beginning of the HS-PDSCH subframe (see sub-clause 7.1).

At any one time, m therefore takes one of a set of five possible values according to the transmission timing of HS-DSCH sub-frame timings relative to the DPCH or F-DPCH frame boundary. The UE and Node B shall only update the set of values of m in connection to UTRAN reconfiguration of downlink timing.

More information about uplink timing adjustments can be found in [5].

Figure 34: Timing structure at the UE for HS-DPCCH control signalling

7.7.2 Timing when Multiflow is configured

The uplink DPCH, the HS-PDSCH of the time reference cell, and uplink HS-DPCCH follow the same time as defined for the non-Multiflow case in section 7.7.1.

The timing relationship between the non-time reference cell’s HS-PDSCH subframe and the related HS-DPCCH subframe is derived from HS-PDSCH frame timing difference DIFF of the two cells, where -20 ≤ DIFF ≤ 3860 chips. The time reference cell for HS-DPCCH is indicated by higher layers.

If DIFF is not within the specified limits:

– HARQ-ACK reporting for the time-reference cell and CQI reporting for both cells are not interrupted.

– The UE is not required to transmit a valid HARQ-ACK for the non-time reference cell.

If the UE is not configured in MIMO mode in any cell, or it is configured in MIMO mode in at least one cell and the UE indicated not requiring a Longer HARQ Processing Time in higher layer capability signalling, then:

Figure 34a shows the timing offset between the uplink DPCH, the HS-PDSCHs and the HS-DPCCH at the UE when the UE is configured with Multiflow. In this case τDIFF = τnon-time reference cell – τtime reference cell.

If the UE is configured in MIMO mode in at least one cell and the UE indicated requiring a Longer HARQ processing Time in higher layer capability signalling, then:

Figure 34b shows the timing offset between the uplink DPCH, the HS-PDSCHs and the HS-DPCCH at the UE when the UE is configured with Multiflow. In this case τDIFF = τtime reference cell – τ non-time reference cell.

τtime reference cell and τnon-time reference cell above refer to the end times of the HS-PDSCH subframes of the time reference cell and the non-time reference cell respectively, with the corresponding HARQ-ACK fields in the same HS-DPCCH sub-frame.

Figure 34a: Timing structure at the UE for HS-DPCCH control signalling with Multiflow, when the UE is not configured in MIMO mode, as well as when the UE is configured in MIMO mode in any cell and the UE indicated not requiring a Longer HARQ processing Time in higher layers

Figure 34b: Timing of delayed HARQ-ACK with Multiflow, when the UE is configured in MIMO mode in any cell, and the UE indicated requiring a Longer HARQ processing Time in higher layers

TTX_diff1 corresponds to the smallest TTX_diff value of the time reference cell as configured by higher layers. One TTX_diff value of the non-time reference cell shall be selected, denoted as , where the associated HS-PDSCH subframe of the time reference cell with TTX_diff1 and the associated HS-PDSCH subframe of the non-time reference cell with , correspond to the same HARQ-ACK field in the same HS-DPCCH sub-frame. TTX_diff2 is defined as in Table 28.

Table 28: Definition of TTX_diff2 for the non-time reference cell

Condition:

TTX_diff2 defined as:

When

When

7.8 HS-SCCH/HS-PDSCH timing

Figure 35 shows the relative timing between the HS-SCCH and the associated HS-PDSCH for one HS-DSCH sub-frame. The HS-PDSCH starts HS-PDSCH = 2Tslot = 5120 chips after the start of the HS-SCCH.

Figure 35: Timing relation between the HS-SCCH and the associated HS-PDSCH.

7.9 MICH/S-CCPCH timing relation

Figure 36 illustrates the timing between the MICH frame boundaries and the frame boundaries of the associated S‑CCPCH, i.e. the S-CCPCH that carries the MBMS control information related to the notification indicators in the MICH frame. The MICH transmission timing shall be such that the end of radio frame boundary occurs MICH chips before the associated S-CCPCH start of radio frame boundary. MICH is equal to 7680 chips.

The MICH frames during which the Node B shall set specific notification indicators and the S‑CCPCH frames during which the Node B shall transmit the corresponding MBMS control data is defined by higher layers.

Figure 36: Timing relation between MICH frame and associated S-CCPCH frame

7.10 E-HICH/P-CCPCH/DPCH timing relation

The timing of the E-HICH relative to the P-CCPCH is illustrated in figure 37.

When the E-DCH TTI is 10 ms the E-HICH frame offset relative to P‑CCPCH shall be E-HICH,n chips with

When the E-DCH TTI is 2 ms the E-HICH frame offset relative to P‑CCPCH shall be E-HICH,n chips with

When a downlink F-DPCH is configured, .

Figure 37: E-HICH timing

7.11 E-RGCH/P-CCPCH/DPCH timing relation

The timing of the E-RGCH relative to the P-CCPCH is illustrated in figure 38.

When transmitted to a UE for which the cell transmitting the E-RGCH is in the E-DCH serving radio link set, the E-RGCH frame offset shall be as follows:

– if the E-DCH TTI is 10 ms, the E-RGCH frame offset relative to P‑CCPCH shall be E-RGCH,n chips with

– if the E-DCH TTI is 2 ms the E-RGCH frame offset relative to P‑CCPCH shall be E-RGCH,n chips with

When a downlink F-DPCH is configured, .

When transmitted to a UE for which the cell transmitting the E-RGCH is not in the E-DCH serving radio link set, the E-RGCH frame offset relative to P‑CCPCH shall be E-RGCH = 5120 chips.

Figure 38: E-RGCH timing

7.12 E-AGCH/P-CCPCH timing relation

The E-AGCH frame offset relative to P‑CCPCH shall be E-AGCH = 5120 chips as illustrated in figure 39.

Figure 39: E-AGCH timing

7.12A E-ROCH/P-CCPCH timing relation

The E-ROCH frame offset relative to P‑CCPCH shall be E-ROCH = 5120 chips as illustrated in figure 39A.

Figure 39A: E-ROCH timing

7.13 E-DPDCH/E-DPCCH/DPCCH timing relation

The frame timing of all the E-DPCCHs and all the E-DPDCHs transmitted from one UE shall be the same as the uplink DPCCH frame timing.

7.14 S-DPCCH/DPCCH timing relation

The frame timing of uplink S-DPCCH transmitted from one UE shall be the same as the uplink DPCCH frame timing.

7.15 DPCH/F-DPCH/F-TPICH timing relations in softer handover

When UE is in softer handover and F-TPICH is transmitted from multiple radio links as defined in [5], the F-TPICH radio frame starts 512 chips after the start of the DPCH/F-DPCH radio frame that corresponds to the same radio link.

7.16 S-E-DPDCH/S-E-DPCCH/DPCCH timing relation

The frame timing of the S-E-DPCCH and all the S-E-DPDCHs transmitted from one UE shall be the same as the uplink DPCCH frame timing.

7.17 DPCCH2/DPCCH timing relation

The frame timing of the uplink DPCCH2 transmitted from one UE shall be the same as the uplink DPCCH frame timing.

Annex A (informative):
Change history

Change history

Date

TSG #

TSG Doc.

CR

Rev

Subject/Comment

Old

New

RAN_05

RP-99587

Approved at TSG RAN #5 and placed under Change Control

3.0.0

14/01/00

RAN_06

RP-99676

001

1

Removal of superframe notation

3.0.0

3.1.0

14/01/00

RAN_06

RP-99677

002

Use of CPICH in case of open loop Tx

3.0.0

3.1.0

14/01/00

RAN_06

RP-99677

003

2

CPCH power control preamble length

3.0.0

3.1.0

14/01/00

RAN_06

RP-99684

005

1

Editorial corrections

3.0.0

3.1.0

14/01/00

RAN_06

RP-99676

006

Change to the description of TSTD for SCH

3.0.0

3.1.0

14/01/00

RAN_06

RP-99678

007

1

Introduction of compressed mode by higher layer scheduling

3.0.0

3.1.0

14/01/00

RAN_06

RP-99676

008

1

Modifications to STTD text

3.0.0

3.1.0

14/01/00

RAN_06

RP-99684

009

1

20 ms RACH message length

3.0.0

3.1.0

14/01/00

RAN_06

RP-99676

010

Update to AICH description

3.0.0

3.1.0

14/01/00

RAN_06

RP-99678

011

1

Sliding paging indicators

3.0.0

3.1.0

14/01/00

RAN_06

RP-99677

016

TAB structure and timing relation for USTS

3.0.0

3.1.0

14/01/00

RAN_06

RP-99677

017

Timing for initialisation procedures

3.0.0

3.1.0

14/01/00

RAN_06

RP-99677

022

Modification of the STTD encoding scheme on DL DPCH with SF 512

3.0.0

3.1.0

14/01/00

Change history was added by the editor

3.1.0

3.1.1

31/03/00

RAN_07

RP-000060

013

6

Addition of a downlink channel indicating CPCH status

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

023

6

CPCH-related editorial changes, technical changes and additions to 25.211 and some clarifications to 7.4 PCPCH/AICH timing relation.

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

024

1

Additional description of TX diversity for PDSCH

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

025

1

Consistent numbering of scrambling code groups

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

026

Minor corrections to timing section

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

028

1

Timing of PDSCH

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

029

1

Modifications to STTD text

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

031

4

CD/CA-ICH for dual mode CPCH

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

033

Clarification of frame synchronization word and its usage

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

034

1

Editorial updates to 25.211

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

036

PDSCH multi-code transmission

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

037

Clarification of pilot bit patterns for CPCH and slot formats for CPCH PC-P and message part

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

039

Further restrictions on the application of the Tx diversity modes in DL

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

040

Clarification of downlink pilot bit patterns

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

041

Clarification of DCH initialisation

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

044

2

Emergency Stop of CPCH transmission and Start of Message Indicator

3.1.1

3.2.0

31/03/00

RAN_07

RP-000060

046

Clean up of USTS related specifications

3.1.1

3.2.0

26/06/00

RAN_08

RP-000265

047

4

Clarifications to power control preamble sections

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

048

Propagation delay for PCPCH

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

049

1

PICH undefined bits and AICH, AP-ICH, CD/CA-ICH non-transmitted chips

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

051

1

Bit value notation change for PICH and CSICH

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

053

1

Revision of notes in sections 5.3.2 and 5.3.2.1

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

054

5

Slot format clarification for CPCH

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

055

3

Physical channel nomenclature in FDD

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

056

3

Clarification for the PDSCH channelisation code association with DPCH in 25.211

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

057

2

Clarification for the PDSCH channelisation code association with DPCH in 25.211

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

058

Clarification of spreading factor for AICH

3.2.0

3.3.0

26/06/00

RAN_08

RP-000265

060

Explicit mention of slot format reconfiguration also for uplink

3.2.0

3.3.0

23/09/00

RAN_09

RP-000340

065

Correction of reference

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

066

4

Clarification of paging indicator mapping

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

068

Editorial modification of the 25.211 about the CD/CA-ICH

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

070

1

Support of closed loop transmit diversity modes

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

071

DPCH initialisation procedure

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

072

3

Correction on indicators

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

074

Correction of STTD for DPCH

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

075

Clarification of first significant path

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

076

Clarification of SCH transmitted by TSTD

3.3.0

3.4.0

23/09/00

RAN_09

RP-000340

077

1

Clarification of FBI field

3.3.0

3.4.0

15/12/00

RAN_10

RP-000537

079

2

Clarification of downlink phase reference

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

083

1

DL Transmission in the case of invalid data frames

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

084

Clarification of figure 28

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

087

RACH message part length

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

088

Clarifications on power control preambles

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

089

1

Proposed CR to 25.211 for transfer of CSICH Information from Layer 3 Specification

3.4.0

3.5.0

15/12/00

RAN_10

RP-000537

090

PCPCH/DL-DPCCH Timing Relationship

3.4.0

3.5.0

16/03/01

RAN_11

Approved as Release 4 specification (v4.0.0) at TSG RAN #11

3.5.0

4.0.0

16/03/01

RAN_11

RP-010058

091

DSCH reading indication

3.5.0

4.0.0

16/03/01

RAN_11

RP-010058

092

1

Clarification of the S-CCPCH frame carrying paging information

3.5.0

4.0.0

16/03/01

RAN_11

RP-010255

095

3

Phase Reference for Secondary CCPCH carrying FACH

3.5.0

4.0.0

16/03/01

RAN_11

RP-010058

096

Uplink power control preamble

3.5.0

4.0.0

15/06/01

RAN_12

RP-010331

098

Downlink Phase Reference for DL-DPCCH for CPCH

4.0.0

4.1.0

15/06/01

RAN_12

RP-010331

100

Removal of out-of-date reference to FACH beamforming

4.0.0

4.1.0

15/06/01

RAN_12

RP-010331

102

Correction of compressed mode by puncturing

4.0.0

4.1.0

15/06/01

RAN_12

RP-010331

104

Correction of the representation of slot format

4.0.0

4.1.0

15/06/01

RAN_12

RP-010331

106

1

Clarification of PDSCH definition

4.0.0

4.1.0

21/09/01

RAN_13

RP-010518

111

2

Correction to DPCH/PDSCH timing

4.1.0

4.2.0

21/09/01

RAN_13

RP-010518

121

1

Clarification of the usage of Tx diversity modes in Soft HOV

4.1.0

4.2.0

21/09/01

RAN_13

RP-010709

114

2

Removal of another reference to FACH beamforming

4.1.0

4.2.0

21/09/01

RAN_13

RP-010518

118

1

Clarification of STTD

4.1.0

4.2.0

14/12/01

RAN_14

RP-010904

116

2

Clarification of the pilot bits on CPCH message part and S-CCPCH

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

123

Addition of pilot bit patterns table of downlink DPCCH for antenna 2 using closed loop mode 1

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

125

Slot format for the CPCH

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

127

1

Clarification of Tx diversity with PDSCH, AP-AICH, CD/CA-ICH and DL-DPCCH associated to CPCH

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

129

1

Interaction between DSCH scheduling and phase reference modification

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

131

Support of multiple CCTrChs of dedicated type

4.2.0

4.3.0

14/12/01

RAN_14

RP-010736

133

Removal of slow power control from TS 25.211

4.2.0

4.3.0

14/12/01

RAN_14

RP-010932

135

Restriction to simultaneous use of SSDT and closed loop mode TX diversity

4.2.0

4.3.0

08/03/02

RAN_15

RP-020046

139

1

Clarification of different diversity modes used in the same active set

4.3.0

4.4.0

08/03/02

RAN_15

RP-020058

146

Specification of HS-DSCH for Release 5 in 25.211

4.3.0

5.0.0

07/06/02

RAN_16

RP-020307

149

1

SCCPCH structure with STTD encoding

5.0.0

5.1.0

07/06/02

RAN_16

RP-020307

153

Downlink bit mapping

5.0.0

5.1.0

07/06/02

RAN_16

RP-020437

147

4

Specification of TX diversity for HSDPA

5.0.0

5.1.0

07/06/02

RAN_16

RP-020316

150

1

Adding section on HS-SCCH/HS-PDSCH timing relation

5.0.0

5.1.0

07/06/02

RAN_16

RP-020316

155

HSDPA subframe definition

5.0.0

5.1.0

07/06/02

RAN_16

RP-020316

157

1

Clarification for uplink HS-DPCCH/HS-PDSCH timing

5.0.0

5.1.0

14/09/02

RAN_17

RP-020591

161

1

Phase reference for HSDPA

5.1.0

5.2.0

14/09/02

RAN_17

RP-020571

164

Reversal of unwanted corrections resulting from CR 25.211-122

5.1.0

5.2.0

14/09/02

RAN_17

RP-020581

168

1

Numbering corrections

5.1.0

5.2.0

14/09/02

RAN_17

RP-020590

169

TX diversity on radio links in the active set

5.1.0

5.2.0

14/09/02

RAN_17

RP-020588

170

1

HS-DPCCH timing correction

5.1.0

5.2.0

14/09/02

RAN_17

RP-020587

171

Inclusion of closed loop transmit diversity for HSDPA

5.1.0

5.2.0

14/09/02

RAN_17

RP-020581

172

Physical channel mapping

5.1.0

5.2.0

20/12/02

RAN_18

RP-020845

173

Correction of the number of transport channels in clause 4.1

5.2.0

5.3.0

20/12/02

RAN_18

RP-020845

175

HSDPA Tx diversity of closed loop transmit diversity mode 2 use with HS-PDSCH/HS-SCCH

5.2.0

5.3.0

21/06/03

RAN_20

RP-030271

178

Alignment of the terminology, "subframe"

5.3.0

5.4.0

21/06/03

RAN_20

RP-030271

179

Correction of AICH description

5.3.0

5.4.0

21/06/03

RAN_20

RP-030271

180

Correction of description of TTX_diff

5.3.0

5.4.0

21/09/03

RAN_21

RP-030462

186

1

Removal of the combination of TxAA Mode 1 with HS-SCCH

5.4.0

5.5.0

13/01/04

RAN_22

Created for M.1457 update

5.5.0

6.0.0

09/06/04

RAN_24

RP-040231

189

1

Re-Introduction of S-CPICH in combination with Closed Loop TxDiversity

6.0.0

6.1.0

09/06/04

RAN_24

RP-040231

190

Clarification of NTFCI field of DL-DPCCH power preamble for CPCH

6.0.0

6.1.0

07/09/04

RAN_25

RP-040317

192

Correction for the slot range of DL DPCCH power control preamble for CPCH

6.1.0

6.2.0

13/12/04

RAN_26

RP-040449

195

1

Introduction of E-DCH

6.2.0

6.3.0

13/12/04

RAN_26

RP-040450

193

1

Introduction of MICH

6.2.0

6.3.0

14/03/05

RAN_27

RP-050043

197

1

E-HICH/E-RGCH Signature Sequences

6.3.0

6.4.0

14/03/05

RAN_27

RP-050043

198

1

E-HICH/E-RGCH Signature Sequence Hopping

6.3.0

6.4.0

14/03/05

RAN_27

RP-050090

202

2

E-HICH/E-RGCH/E-AGCH timing

6.3.0

6.4.0

14/03/05

RAN_27

RP-050088

200

1

Introduction of F-DPCH without pilot field

6.3.0

6.4.0

16/06/05

RAN_28

RP-050357

203

2

Correction of text on E-RGCH duration

6.4.0

6.5.0

16/06/05

RAN_28

RP-050250

205

1

Feature Clean Up: Removal of "CPCH"

6.4.0

6.5.0

16/06/05

RAN_28

RP-050248

207

Feature Clean Up: Removal of DSCH (FDD mode)

6.4.0

6.5.0

16/06/05

RAN_28

RP-050252

210

1

Clarification on E-AGCH transmission interval

6.4.0

6.5.0

16/06/05

RAN_28

RP-050256

211

2

Clarification on phase reference for downlink channels

6.4.0

6.5.0

16/06/05

RAN_28

RP-050252

212

1

Clarification on E-DCH timing

6.4.0

6.5.0

16/06/05

RAN_28

RP-050244

214

Feature Clean Up: Removal of "SSDT"

6.4.0

6.5.0

16/06/05

RAN_28

RP-050247

217

Feature clean up: Removal of the ‘TX diversity closed loop mode 2’

6.4.0

6.5.0

16/06/05

RAN_28

RP-050249

219

Feature clean up: Removal of the ‘compressed mode by puncturing’

6.4.0

6.5.0

16/06/05

RAN_28

RP-050246

221

Feature Clean Up: Removal of dedicated pilot as sole phase reference

6.4.0

6.5.0

26/09/05

RAN_29

RP-050450

0222

SF max for E-DPDCH

6.5.0

6.6.0

26/09/05

RAN_29

RP-050450

0223

1

DPCCH, E-DPCCH, E-DPDCH combinations

6.5.0

6.6.0

26/09/05

RAN_29

RP-050543

0244

Correcting the accidential removal of F-DPCH, MICH, E-AGCH, E-RGCH and E-HICH from Tx Diversity applicability table

6.5.0

6.6.0

12/12/05

RAN_30

RP-050726

0224

Clean up due to removal of NTPC=1

6.6.0

6.7.0

12/12/05

RAN_30

RP-050727

0225

2

Combination of DPCCH and E-DCH

6.6.0

6.7.0

12/12/05

RAN_30

RP-050725

0227

Clean up due to removal of CSICH

6.6.0

6.7.0

20/03/06

RAN_31

Creation of Release 7 specification (v7.0.0) at RAN#31

6.7.0

7.0.0

07/03/07

RAN_35

RP-070114

0238

Transmit diversity operation in MIMO mode

7.0.0

7.1.0

07/03/07

RAN_35

RP-070115

0230

2

Support of CPC feature

7.0.0

7.1.0

07/03/07

RAN_35

RP-070115

0231

Support of CPC feature: addition of subframe numbering

7.0.0

7.1.0

07/03/07

RAN_35

RP-070116

0234

2

Introduction of 64QAM for HSDPA

7.0.0

7.1.0

30/05/07

RAN_36

RP-070388

0235

2

Introduction of 16QAM for HSUPA

7.1.0

7.2.0

30/05/07

RAN_36

RP-070384

0237

3

Support for DL only SFN operation for MBMS FDD

7.1.0

7.2.0

30/05/07

RAN_36

RP-070390

0239

3

Introduction of PICH to HS-SCCH timing relation and Tx diversity definition for HS-DSCH without associated DL dedicated channel

7.1.0

7.2.0

30/05/07

RAN_36

RP-070387

0240

Definition of abbreviation "MIMO"

7.1.0

7.2.0

30/05/07

RAN_36

RP-070389

0241

Clarification for CPC feature

7.1.0

7.2.0

11/09/07

RAN_37

RP-070639

0246

1

Clarification on MICH

7.2.0

7.3.0

11/09/07

RAN_37

RP-070649

0232

3

Enhanced F-DPCH

7.2.0

7.3.0

11/09/07

RAN_37

RP-070643

0242

1

PICH associated HS-SCCH for Enhanced CELL_FACH

7.2.0

7.3.0

11/09/07

RAN_37

RP-070641

0243

Clarification for CPC feature

7.2.0

7.3.0

11/09/07

RAN_37

RP-070646

0245

Clarifications on the use of S-CCPCH pilot bits for MBSFN FDD feature

7.2.0

7.3.0

27/11/07

RAN_38

RP-070940

0250

Correction to E-DPCCH transmission

7.3.0

7.4.0

27/11/07

RAN_38

RP-070941

0248

Correction to transmit diversity specification in MIMO mode

7.3.0

7.4.0

27/11/07

RAN_38

RP-070941

0251

1

Mention PCI as part of HS-DPCCH structure

7.3.0

7.4.0

04/03/08

RAN_39

RP-080142

0252

Correction to tie use of transmit diversity on SCH and P-CCPCH

7.4.0

7.5.0

04/03/08

RAN_39

Release 8 version created further to RAN_39 decision

7.5.0

8.0.0

28/05/08

RAN_40

RP-080351

0255

1

Correction to E-DCH control channel timing

8.0.0

8.1.0

10/09/08

RAN_41

RP-080672

0256

2

Introduction of the Enhanced Uplink for CELL_FACH state

8.1.0

8.2.0

03/12/08

RAN_42

RP-080989

257

3

Introduction of Dual-Cell HSDPA Operation on Adjacent Carriers

8.2.0

8.3.0

03/12/08

RAN_42

RP-080986

259

1

Removal of a reference to E-AICH

8.2.0

8.3.0

03/03/09

RAN_43

RP-090229

261

1

Clarifications to the S-CPICH usage with MIMO

8.3.0

8.4.0

03/03/09

RAN_43

RP-090227

263

1

Clarification of ACK transmission in response to HS-SCCH order

8.3.0

8.4.0

15/09/09

RAN_45

RP-090890

268

Clarification on STTD encoding description for AICH

8.4.0

8.5.0

15/09/09

RAN_45

RP-090883

270

2

Clarification of the applicability of Transmit Diversity

8.4.0

8.5.0

15/09/09

RAN_45

RP-090884

273

Clarification of associated channel for HS-DSCH

8.4.0

8.5.0

18/09/09

RAN_45

Release 9 version created further to RAN_45 decision

8.5.0

9.0.0

01/12/09

RAN_46

RP-091170

274

2

Introduction of DC-HSUPA

9.0.0

9.1.0

01/12/09

RAN_46

RP-091171

278

2

Clarification of Tx diversity mode and phase reference for DC-HSDPA and MIMO operation

9.0.0

9.1.0

01/12/09

RAN_46

RP-091160

281

Clarification to MIMO phase references

9.0.0

9.1.0

14/09/10

RAN_49

RP-100892

287

1

Clarification of PICH/HS-SCCH timing relation

9.1.0

9.2.0

16/09/10

RAN_49

RP-100902

284

2

Release 10 created with the introduction of 4C-HSDPA

9.2.0

10.0.0

05/12/11

RAN_54

RP-111671

288

5

Introduction of 8C-HSDPA

10.0.0

11.0.0

05/12/11

RAN_54

RP-111672

289

Introduction of Uplink Closed Loop Transmit Diversity for HSPA

10.0.0

11.0.0

04/09/12

RAN_57

RP-121271

295

2

Introduction of Multiflow

11.0.0

11.1.0

04/09/12

RAN_57

RP-121270

298

1

Introduction of Further Enhancements to CELL_FACH

11.0.0

11.1.0

04/09/12

RAN_57

RP-121384

299

Correction of F-TPICH transmission

11.0.0

11.1.0

04/12/12

RAN_58

RP-121845

296

5

Introduction of uplink MIMO and 64QAM

11.1.0

11.2.0

04/12/12

RAN_58

RP-121843

297

6

Introduction of 4Tx_HSDPA in 25.211

11.1.0

11.2.0

04/12/12

RAN_58

RP-121838

305

1

Removal of the relative amplitude weighting factor between EAI and AI

11.1.0

11.2.0

04/12/12

RAN_58

RP-121844

306

1

Clarifications and corrections to HSDPA Multiflow

11.1.0

11.2.0

04/12/12

RAN_58

RP-121842

307

1

Clarification of TTI Alignment

11.1.0

11.2.0

04/12/12

RAN_58

RP-121842

308

Correction to common E-RGCH

11.1.0

11.2.0

26/02/13

RAN_59

RP-130251

310

1

UE behaviour when non-time reference cell is out of time window

11.2.0

11.3.0

11/06/13

RAN_60

RP-130745

312

3

Correction to the Four Branch MIMO Transmit Diversity

11.3.0

11.4.0

11/06/13

RAN_60

RP-130746

313

1

Signature and default common E-DCH resource mapping

11.3.0

11.4.0

10/06/14

RAN_64

RP-140860

317

Correction of DRX operation for Multiflow

11.4.0

11.5.0

10/09/14

RAN_65

RP-141482

315

2

Introduction of Enhanced Broadcast of System Information

11.5.0

12.0.0

10/09/14

RAN_65

RP-141480

316

3

Introduction of DCH Enhancements

11.5.0

12.0.0

10/09/14

RAN_65

RP-141481

318

1

Introduction of UMTS Heterogeneous Networks enhancements

11.5.0

12.0.0

08/12/14

RAN_66

RP-142101

320

1

Correction of DL FET

12.0.0

12.1.0

08/12/14

RAN_66

RP-142102

321

1

Clarifications to Heterogeneous Networks

12.0.0

12.1.0

07/12/15

RAN_70

RP-152023

322

4

Introduction of Dual Carrier HSUPA enhancements for UTRAN CS in TS 25.211

12.1.0

13.0.0

Change history

Date

Meeting

TDoc

CR

Rev

Cat

Subject/Comment

New version

2016-09

RP-73

RP-161568

0324

1

A

On adding the TS 25.321 to the list of references of TS 25.211, which used in the definition of "UL DPCH 10ms Mode"

13.1.0

2017-03

RP-75

Promotion to Release 14 without technical change (MCC)

14.0.0

2018-06

RP-80

Promotion to Release 15 without technical change (MCC)

15.0.0

2020-07

RP-88e

Upgrade to Rel-16 version without technical change

16.0.0

2022-03

RP-95e

Upgrade to Rel-17 version without technical change

17.0.0