A.3.3 Reference measurement channels for PDCCH performance requirements
38.521-43GPPNRPart 4: PerformanceRadio transmission and receptionRelease 17TSUser Equipment (UE) conformance specification
A.3.3.1 FDD
A.3.3.1.1 Reference measurement channels for SCS 15 kHz FR1
Table A.3.3.1.1-1: PDCCH Reference Channels (Time domain allocation 1 symbol)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.1-1.1 FDD |
R.PDCCH.1-1.2 FDD |
R.PDCCH.1-1.3 FDD |
||||
Subcarrier spacing |
kHz |
15 |
15 |
15 |
|||
CORESET frequency domain allocation |
48 |
48 |
48 |
||||
CORESET time domain allocation |
1 |
1 |
1 |
||||
Aggregation level |
4 |
4 |
8 |
||||
DCI Format |
1_0 |
1_1 |
1_1 |
||||
Payload (without CRC) |
Bits |
39 |
52 |
52 |
Table A.3.3.1.1-2: PDCCH Reference Channel (Time domain allocation 2 symbols)
Parameter |
Unit |
Value |
||||||
Reference channel |
R.PDCCH.1-2.1 FDD |
R.PDCCH.1-2.2 FDD |
R.PDCCH.1-2.3 FDD |
R.PDCCH.1-2.4 FDD |
R.PDCCH.1-2.5 FDD |
R.PDCCH.1-2.6 FDD |
R.PDCCH.1-2.7 FDD |
|
Subcarrier spacing |
kHz |
15 |
15 |
15 |
15 |
15 |
15 |
15 |
CORESET frequency domain allocation |
24 |
24 |
24 |
48 |
48 |
48 |
48 |
|
CORESET time domain allocation |
2 |
2 |
2 |
2 |
2 |
2 |
2 |
|
Aggregation level |
2 |
4 |
2 |
4 |
8 |
16 |
8 |
|
DCI Format |
1_0 |
1_0 |
1_1 |
1_1 |
1_1 |
1_0 |
2_6 |
|
Payload (without CRC) |
Bits |
39 |
39 |
52 |
52 |
52 |
39 |
12 |
Table A.3.3.1.1-3: Additional PDSCH Reference Channel FDD
Parameter |
Unit |
Value |
|
DCI Format |
1_0 |
1_1 |
|
Channel bandwidth |
MHz |
10 |
10 |
Subcarrier spacing |
kHz |
15 |
15 |
Number of allocated resource blocks |
PRBs |
52 |
52 |
Number of consecutive PDSCH symbols |
12 |
12 |
|
Allocated slots per 2 frames |
Slots |
19 |
19 |
MCS table |
64QAM |
64QAM |
|
MCS index |
4 |
4 |
|
Modulation |
QPSK |
QPSK |
|
Target Coding Rate |
0.30 |
0.30 |
|
Number of MIMO layers |
1 |
1 |
|
Number of DMRS REs |
12 |
12 |
|
Overhead for TBS determination |
0 |
0 |
|
Information Bit Payload per Slot |
|||
For Slot i = 0 |
Bits |
N/A |
N/A |
For Slots i = 1,…, 19 |
Bits |
3368 |
4096 |
Transport block CRC per Slot |
|||
For Slot i = 0 |
Bits |
N/A |
N/A |
For Slots i = 1,…, 19 |
Bits |
16 |
24 |
Number of Code Blocks per Slot |
|||
For Slot i = 0 |
CBs |
N/A |
N/A |
For Slots i = 1,…, 19 |
CBs |
1 |
1 |
Binary Channel Bits Per Slot |
|||
For Slot i = 0 |
Bits |
N/A |
N/A |
For Slots i = 10, 11 |
Bits |
9984 |
13104 |
For Slots i = 1,…, 9, 12, …, 19 |
Bits |
11232 |
13728 |
Max. Throughput averaged over 2 frames |
Mbps |
3.1996 |
3.8912 |
Note 1: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms. Note 2: Slot i is slot index per 2 frames. |
A.3.3.1.2 Reference measurement channels for SCS 30 kHz FR1
Table A.3.3.1.2-1: PDCCH Reference Channels (Time domain allocation 1 symbol)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.2-1.1 FDD |
R.PDCCH.2-1.2 FDD |
R.PDCCH.2-1.3 FDD |
||||
Subcarrier spacing |
kHz |
30 |
30 |
30 |
|||
CORESET frequency domain allocation |
102 |
102 |
90 |
||||
CORESET time domain allocation |
1 |
1 |
1 |
||||
Aggregation level |
2 |
4 |
8 |
||||
DCI Format |
1_0 |
1_1 |
1_1 |
||||
Payload (without CRC) |
Bits |
41 |
53 |
53 |
Table A.3.3.1.2-2: PDCCH Reference Channel (Time domain allocation 2 symbols)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.2-2.1 FDD |
||||||
Subcarrier spacing |
kHz |
30 |
|||||
CORESET frequency domain allocation |
48 |
||||||
CORESET time domain allocation |
2 |
||||||
Aggregation level |
16 |
||||||
DCI Format |
1_0 |
||||||
Payload (without CRC) |
Bits |
41 |
A.3.3.2 TDD
A.3.3.2.1 Reference measurement channels for SCS 15 kHz FR1
Table A.3.3.2.1-1: PDCCH Reference Channels (Time domain allocation 1 symbol)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.1-1.1 TDD |
R.PDCCH.1-1.2 TDD |
R.PDCCH.1-1.3 TDD |
||||
Subcarrier spacing |
kHz |
15 |
15 |
15 |
|||
CORESET frequency domain allocation |
48 |
48 |
48 |
||||
CORESET time domain allocation |
1 |
1 |
1 |
||||
Aggregation level |
4 |
4 |
8 |
||||
DCI Format |
1_0 |
1_1 |
1_1 |
||||
Payload (without CRC) |
Bits |
39 |
52 |
52 |
Table A.3.3.2.1-2: PDCCH Reference Channel (Time domain allocation 2 symbols)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.1-2.1 TDD |
R.PDCCH.1-2.2 TDD |
R.PDCCH.1-2.3 TDD |
R.PDCCH.1-2.4 TDD |
R.PDCCH.1-2.5 TDD |
R.PDCCH.1-2.6 TDD |
|
Subcarrier spacing |
kHz |
15 |
15 |
15 |
15 |
15 |
15 |
CORESET frequency domain allocation |
24 |
24 |
24 |
48 |
48 |
48 |
|
CORESET time domain allocation |
2 |
2 |
2 |
2 |
2 |
2 |
|
Aggregation level |
2 |
4 |
2 |
4 |
8 |
16 |
|
DCI Format |
1_0 |
1_0 |
1_1 |
1_1 |
1_1 |
1_0 |
|
Payload (without CRC) |
Bits |
39 |
39 |
52 |
52 |
52 |
39 |
A.3.3.2.2 Reference measurement channels for SCS 30 kHz FR1
Table A.3.3.2.2-1: PDCCH Reference Channels (Time domain allocation 1 symbol)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.2-1.1 TDD |
R.PDCCH.2-1.2 TDD |
R.PDCCH.2-1.3 TDD |
R.PDCCH.2-1.4 TDD |
|||
Subcarrier spacing |
kHz |
30 |
30 |
30 |
30 |
||
CORESET frequency domain allocation |
102 |
102 |
90 |
102 |
|||
CORESET time domain allocation |
1 |
1 |
1 |
1 |
|||
Aggregation level |
2 |
4 |
8 |
8 |
|||
DCI Format |
1_0 |
1_1 |
1_1 |
2_6 |
|||
Payload (without CRC) |
Bits |
41 |
53 |
53 |
12 |
Table A.3.3.2.2-2: PDCCH Reference Channel (Time domain allocation 2 symbols)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.2-2.1 TDD |
||||||
Subcarrier spacing |
kHz |
30 |
|||||
CORESET frequency domain allocation |
48 |
||||||
CORESET time domain allocation |
2 |
||||||
Aggregation level |
16 |
||||||
DCI Format |
1_0 |
||||||
Payload (without CRC) |
Bits |
41 |
Table A.3.3.2.2-3: Additional PDSCH Reference Channel TDD
Parameter |
Unit |
Value |
|
DCI Format |
1-0 |
1-1 |
|
TDD UL/DL pattern |
FR1.30-1 |
FR1.30-1 |
|
Channel bandwidth |
MHz |
40 |
40 |
Subcarrier spacing |
kHz |
30 |
30 |
Allocated resource blocks |
PRBs |
106 |
106 |
Number of consecutive PDSCH symbols |
|||
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
4 |
4 |
|
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
12 |
12 |
|
Allocated slots per 2 frames |
31 |
31 |
|
MCS table |
64QAM |
64QAM |
|
MCS index |
4 |
4 |
|
Modulation |
QPSK |
QPSK |
|
Target Coding Rate |
0.30 |
0.3 |
|
Number of MIMO layers |
1 |
1 |
|
Number of DMRS rEs |
|||
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
6 |
6 |
|
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
12 |
12 |
|
Overhead for TBS determination |
0 |
0 |
|
Information Bit Payload per Slot |
|||
For Slots 0 and Slot i, if mod(i, 10) = {8,9} for i from {0,…,39} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
Bits |
2280 |
2664 |
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
Bits |
6912 |
8456 |
Transport block CRC per Slot |
|||
For Slots 0 and Slot i, if mod(i, 10) = {8,9} for i from {0,…,39} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
Bits |
16 |
16 |
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
Bits |
24 |
24 |
Number of Code Blocks per Slot |
|||
For Slots 0 and Slot i, if mod(i, 10) = {8,9} for i from {0,…,39} |
CBs |
N/A |
N/A |
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
CBs |
1 |
1 |
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
CBs |
1 |
2 |
Binary Channel Bits Per Slot |
|||
For Slots 0 and Slot i, if mod(i, 10) = {8,9} for i from {0,…,39} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 10) = 7 for i from {0,…,39} |
Bits |
7488 |
8904 |
For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6) for i from {1,…,39} |
Bits |
22896 |
27984 |
Max. Throughput averaged over 2 frames |
Mbps |
9.78 |
11.94 |
A.3.3.2.3 Reference measurement channels for SCS 60 kHz FR1
A.3.3.2.4 Reference measurement channels for SCS 60 kHz FR2
A.3.3.2.5 Reference measurement channels for SCS 120 kHz FR2
Table A.3.3.2.5-1: PDCCH Reference Channels (Time domain allocation 1 symbol)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.5-1.1 TDD |
R.PDCCH.5-1.2 TDD |
R.PDCCH.5-1.3 TDD |
R.PDCCH.5-1.4 TDD |
|||
Subcarrier spacing |
kHz |
120 |
120 |
120 |
120 |
||
CORESET frequency domain allocation |
60 |
60 |
60 |
60 |
|||
CORESET time domain allocation |
1 |
1 |
1 |
1 |
|||
Aggregation level |
2 |
4 |
8 |
8 |
|||
DCI Format |
1_0 |
1_1 |
1_1 |
2_6 |
|||
Payload (without CRC) |
Bits |
40 |
56 |
56 |
12 |
Table A.3.3.2.5-2: PDCCH Reference Channel (Time domain allocation 2 symbols)
Parameter |
Unit |
Value |
|||||
Reference channel |
R.PDCCH.5-2.1 TDD |
||||||
Subcarrier spacing |
kHz |
120 |
|||||
CORESET frequency domain allocation |
60 |
||||||
CORESET time domain allocation |
2 |
||||||
Aggregation level |
16 |
||||||
DCI Format |
1_0 |
||||||
Payload (without CRC) |
Bits |
40 |
Table A.3.3.2.5-3: Additional PDSCH Reference Channel TDD
Parameter |
Unit |
Value |
|
DCI format |
DCI 1_0 |
DCI 1_1 |
|
TDD UL/DL pattern |
|||
Channel bandwidth |
MHz |
100 |
100 |
Subcarrier spacing |
kHz |
120 |
120 |
Allocated resource blocks |
PRBs |
66 |
66 |
Number of consecutive PDSCH symbols |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
N/A |
N/A |
|
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
9 |
9 |
|
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
13 |
13 |
|
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
13 |
13 |
|
Allocated slots per 2 frames |
126 |
126 |
|
MCS table |
64QAM |
64QAM |
|
MCS index |
4 |
4 |
|
Modulation |
QPSK |
QPSK |
|
Target Coding Rate |
0.30 |
0.30 |
|
Number of MIMO layers |
1 |
1 |
|
Number of DMRS REs |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
N/A |
N/A |
|
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
12 |
12 |
|
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
12 |
12 |
|
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
12 |
12 |
|
Overhead for TBS determination |
6 |
6 |
|
Information Bit Payload per Slot |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
Bits |
3104 |
3624 |
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
Bits |
4480 |
5504 |
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
4480 |
5504 |
|
Transport block CRC per Slot |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
Bits |
16 |
16 |
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
Bits |
24 |
24 |
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
24 |
24 |
|
Number of Code Blocks per Slot |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
CBs |
N/A |
N/A |
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
CBs |
1 |
1 |
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
CBs |
1 |
1 |
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
1 |
1 |
|
Binary Channel Bits Per Slot |
|||
For Slots 0, 5 and Slot i, if mod(i, 5) = 4 for i from {0,…,159} |
Bits |
N/A |
N/A |
For Slot i, if mod(i, 5) = 3 for i from {0,…, 159} |
Bits |
10296 |
11880 |
For Slot i, if mod(i, 5) = {1,2} for i from {1,…,159} |
Bits |
15048 |
18216 |
For Slot i, if mod(i, 5) = {0} for i from {6,…,159} |
15048 |
18216 |
|
Max. Throughput averaged over 2 frames |
Mbps |
26,022 |
31.667 |
Note 1: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms. Note 2: Slot i is slot index per 2 frames |