A.3.2_1 Reference measurement channels for Sustained downlink data rate performance requirements

38.521-43GPPNRPart 4: PerformanceRadio transmission and receptionRelease 17TSUser Equipment (UE) conformance specification

A.3.2_1.1 FDD

A.3.2_1.1.1 Reference measurement channels for SCS 15 kHz FR1

Table A.3.2_1.1.1-1: Sustained Downlink Data Rate Reference Channel for FDD 15kHz SCS FR1 (64QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

10

15

52

13

18

64QAM

0.46

1

1

20496

24

3

44928

17.422

20

15

106

13

18

64QAM

0.46

1

1

42016

24

5

91584

35.714

10

15

52

13

22

64QAM

0.65

1

1

29192

24

4

44928

24.813

20

15

106

13

22

64QAM

0.65

1

1

59432

24

8

91584

50.517

10

15

52

13

23

64QAM

0.7

1

1

31752

24

4

44928

26.989

20

15

106

13

23

64QAM

0.7

1

1

64552

24

8

91584

54.869

10

15

52

13

27

64QAM

0.89

1

1

39936

24

5

44928

33.946

20

15

106

13

27

64QAM

0.89

1

1

81976

24

10

91584

69.68

10

15

52

13

18

64QAM

0.46

2

1

40976

24

5

89856

34.83

20

15

106

13

18

64QAM

0.46

2

1

83976

24

10

183168

71.38

10

15

52

13

22

64QAM

0.65

2

1

58384

24

7

89856

49.626

20

15

106

13

22

64QAM

0.65

2

1

118896

24

15

183168

101.062

10

15

52

13

23

64QAM

0.7

2

1

63528

24

8

89856

53.999

20

15

106

13

23

64QAM

0.7

2

1

129128

24

16

183168

109.759

10

15

52

13

27

64QAM

0.89

2

1

79896

24

10

89856

67.912

20

15

106

13

27

64QAM

0.89

2

1

163976

24

20

183168

139.38

10

15

52

13

19

64QAM

0.5

4

1

83976

24

10

164736

71.38

20

15

106

13

19

64QAM

0.5

4

1

167976

24

20

335808

142.78

10

15

52

13

23

64QAM

0.7

4

1

114776

24

14

164736

97.56

20

15

106

13

23

64QAM

0.7

4

1

237776

24

29

335808

202.11

10

15

52

13

24

64QAM

0.75

4

1

125016

24

15

164736

106.264

20

15

106

13

24

64QAM

0.75

4

1

254176

24

31

335808

216.05

10

15

52

13

27

64QAM

0.89

4

1

147576

24

18

164736

125.44

20

15

106

13

27

64QAM

0.89

4

1

295176

24

36

335808

250.9

Note 1: Allocated full DL slots are with slot index i, if i is not in {0,10,11} for i = 0,1,…,19. So total number of allocated slots per 2 frames is 17.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is not enabled. MCS 18 and 19 are equivalent to MCS 11 and 12 in 256QAM table, respectively.

Note 3: Number of DMRS REs per RB = 12,12,24,24 for number of MIMO layers = 1,2,3,4, respectively

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 0.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Table A.3.2_1.1.1-2: Sustained Downlink Data Rate Reference Channel for FDD 15kHz SCS FR1 (256QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

10

15

52

13

20

256QAM

0.67

1

1

39936

24

5

59904

33.946

20

15

106

13

20

256QAM

0.67

1

1

81976

24

10

122112

69.68

10

15

52

13

21

256QAM

0.69

1

1

42016

24

5

59904

35.714

20

15

106

13

21

256QAM

0.69

1

1

83976

24

10

122112

71.38

10

15

52

13

26

256QAM

0.9

1

1

53288

24

7

59904

45.295

20

15

106

13

26

256QAM

0.9

1

1

108552

24

13

122112

92.269

10

15

52

13

20

256QAM

0.67

2

1

79896

24

10

119808

67.912

20

15

106

13

20

256QAM

0.67

2

1

163976

24

20

244224

139.38

10

15

52

13

21

256QAM

0.69

2

1

83976

24

10

119808

71.38

20

15

106

13

21

256QAM

0.69

2

1

167976

24

20

244224

142.78

25

15

133

13

21

256QAM

0.69

2

1

213176

24

26

306432

181.2

10

15

52

13

26

256QAM

0.9

2

1

106576

24

13

119808

90.59

20

15

106

13

26

256QAM

0.9

2

1

217128

24

26

244224

184.559

10

15

52

13

22

256QAM

0.74

4

1

159880

24

19

219648

135.898

20

15

106

13

22

256QAM

0.74

4

1

327888

24

39

447744

278.705

10

15

52

13

23

256QAM

0.78

4

1

172176

24

21

219648

146.35

20

15

106

13

23

256QAM

0.78

4

1

352440

24

42

447744

299.574

25

15

133

13

23

256QAM

0.78

4

1

434280

24

52

561792

369.138

10

15

52

13

26

256QAM

0.9

4

1

196776

24

24

219648

167.26

20

15

106

13

26

256QAM

0.9

4

1

401640

24

48

447744

341.394

Note 1: Allocated full DL slots are with slot index i, if i is not in {0,10,11} for i = 0,1,…,19. So total number of allocated slots per 2 frames is 17.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is enabled.

Note 3: Number of DMRS REs per RB = 12,12,24,24 for number of MIMO layers = 1,2,3,4, respectively

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 0.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

A.3.2_1.2 TDD

A.3.2_1.2.1 Reference measurement channels for SCS 30 kHz FR1

Table A.3.2_1.2.1-1: Sustained Downlink Data Rate Reference Channel for TDD 30kHz SCS FR1 (64QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

20

30

51

13

18

64QAM

0.46

1

1

19968

24

3

44064

24.96

100

30

273

13

18

64QAM

0.46

1

1

106576

24

13

235872

133.22

20

30

51

13

22

64QAM

0.65

1

1

28680

24

4

44064

35.85

100

30

273

13

22

64QAM

0.65

1

1

151608

24

18

235872

189.51

20

30

51

13

23

64QAM

0.7

1

1

30728

24

4

44064

38.41

100

30

273

13

23

64QAM

0.7

1

1

163976

24

20

235872

204.97

20

30

51

13

27

64QAM

0.89

1

1

38936

24

5

44064

48.67

100

30

273

13

27

64QAM

0.89

1

1

208976

24

25

235872

261.22

20

30

51

13

18

64QAM

0.46

2

1

39936

24

5

88128

49.92

100

30

273

13

18

64QAM

0.46

2

1

213176

24

26

471744

266.47

20

30

51

13

22

64QAM

0.65

2

1

57376

24

7

88128

71.72

100

30

273

13

22

64QAM

0.65

2

1

303240

24

36

471744

379.05

20

30

51

13

23

64QAM

0.7

2

1

61480

24

8

88128

76.85

100

30

273

13

23

64QAM

0.7

2

1

327888

24

39

471744

409.86

20

30

51

13

27

64QAM

0.89

2

1

77896

24

10

88128

97.37

100

30

273

13

27

64QAM

0.89

2

1

417976

24

50

471744

522.47

20

30

51

13

19

64QAM

0.5

4

1

81976

24

10

161568

102.47

100

30

273

13

19

64QAM

0.5

4

1

434280

24

52

864864

542.85

20

30

51

13

23

64QAM

0.7

4

1

112648

24

14

161568

140.81

100

30

273

13

23

64QAM

0.7

4

1

606504

24

72

864864

758.13

20

30

51

13

24

64QAM

0.75

4

1

120936

24

15

161568

151.17

100

30

273

13

24

64QAM

0.75

4

1

655800

24

78

864864

819.75

20

30

51

13

27

64QAM

0.89

4

1

143400

24

18

161568

179.25

100

30

273

13

27

64QAM

0.89

4

1

770568

24

92

864864

963.21

Note 1: Allocated full DL slots are with slot index i, if mod(i,10) = 0,1,2,3,4,5,6 and i is not in {0,20,21} for i = 0,1,…,39. So total number of allocated slots per 2 frames is 25.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is not enabled. MCS 18 and 19 are equivalent to MCS 11 and 12 in 256QAM table, respectively.

Note 3: Number of DMRS REs per RB = 12,12,24,24 for number of MIMO layers = 1,2,3,4, respectively

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 0.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Table A.3.2_1.2.1-2: Sustained Downlink Data Rate Reference Channel for TDD 30kHz SCS FR1(256QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

20

30

51

13

20

256QAM

0.67

1

1

38936

24

5

58752

48.67

100

30

273

13

20

256QAM

0.67

1

1

208976

24

25

314496

261.22

20

30

51

13

21

256QAM

0.69

1

1

40976

24

5

58752

51.22

100

30

273

13

21

256QAM

0.69

1

1

217128

24

26

314496

271.41

20

30

51

13

26

256QAM

0.9

1

1

52224

24

7

58752

65.28

100

30

273

13

26

256QAM

0.9

1

1

278776

24

34

314496

348.47

20

30

51

13

20

256QAM

0.67

2

1

77896

24

10

117504

97.37

100

30

273

13

20

256QAM

0.67

2

1

417976

24

50

628992

522.47

20

30

51

13

21

256QAM

0.69

2

1

81976

24

10

117504

102.47

100

30

273

13

21

256QAM

0.69

2

1

434280

24

52

628992

542.85

20

30

51

13

26

256QAM

0.9

2

1

104496

24

13

117504

130.62

100

30

273

13

26

256QAM

0.9

2

1

557416

24

67

628992

696.77

20

30

51

13

22

256QAM

0.74

4

1

159880

24

19

215424

199.85

100

30

273

13

22

256QAM

0.74

4

1

852696

24

102

1153152

1065.87

20

30

51

13

23

256QAM

0.78

4

1

167976

24

20

215424

209.97

100

30

273

13

23

256QAM

0.78

4

1

901344

24

107

1153152

1126.68

20

30

51

13

26

256QAM

0.9

4

1

192624

24

23

215424

240.78

100

30

273

13

26

256QAM

0.9

4

1

1032192

24

123

1153152

1290.24

Note 1: Allocated full DL slots are with slot index i, if mod(i,10) = 0,1,2,3,4,5,6 and i is not in {0,20,21} for i = 0,1,…,39. So total number of allocated slots per 2 frames is 25.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is enabled.

Note 3: Number of DMRS REs per RB = 12,12,24,24 for number of MIMO layers = 1,2,3,4, respectively

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 0.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Table A.3.2_1.2.1-3: Sustained Downlink Data Rate Reference Channel for TDD 120kHz SCS FR2 (QPSK)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

50

120

32

13

9

QPSK

0.66

1

1

5888

24

1

8800

27.379

100

120

66

13

9

QPSK

0.66

1

1

12040

24

2

18150

55.986

200

120

132

13

9

QPSK

0.66

1

1

24072

24

3

36300

111.935

50

120

32

13

9

QPSK

0.66

2

1

11784

24

2

17600

54.796

100

120

66

13

9

QPSK

0.66

2

1

24072

24

3

36300

111.935

200

120

132

13

9

QPSK

0.66

2

1

48168

24

6

72600

223.981

Note 1: Allocated full DL slots are with slot index i, if mod(i,5) = 0,1,2 and i is not in {0,80,81} for i = 0,1,…,159. So total number of allocated slots per 2 frames is 93.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is not enabled.

Note 3: Number of DMRS REs per RB is 12.

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 6.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Table A.3.2_1.2.1-4: Sustained Downlink Data Rate Reference Channel for TDD 120kHz SCS FR2 (16QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

kHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

50

120

32

13

16

16QAM

0.64

1

1

11272

24

2

17600

52.415

100

120

66

13

16

16QAM

0.64

1

1

23568

24

3

36300

109.591

200

120

132

13

16

16QAM

0.64

1

1

47112

24

6

72600

219.071

50

120

32

13

16

16QAM

0.64

2

1

22536

24

3

35200

104.792

100

120

66

13

16

16QAM

0.64

2

1

47112

24

6

72600

219.071

200

120

132

13

16

16QAM

0.64

2

1

94248

24

12

145200

438.253

Note 1: Allocated full DL slots are with slot index i, if mod(i,5) = 0,1,2 and i is not in {0,80,81} for i = 0,1,…,159. So total number of allocated slots per 2 frames is 93.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is not enabled.

Note 3: Number of DMRS REs per RB is 12.

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 6.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Table A.3.2_1.2.1-5: Sustained Downlink Data Rate Reference Channel for TDD 120kHz SCS FR2 (64QAM)

Parameter

Channel bandwidth

Subcarrier spacing

Allocated resource blocks

Number of consecutive PDSCH symbols for allocated full DL slots (Note 1)

MCS Index (Note 2)

Modulation

Target Coding Rate

Number of MIMO layers

LDPC Base Graph

Information Bit Payload per Slot for allocated full DL slots (Note 1)

Transport block CRC per Slot for allocated full DL slots (Note 1)

Number of Code Blocks per Slot for allocated full DL slots (Note 1, 6)

Binary Channel Bits per Slot for allocated full DL slots (Note 1)

Max. Throughput averaged over 2 frames

MHz

KHz

PRBs

Symbols

Bits

Bits

CBs

Bits

Mbps

50

120

32

13

27

64QAM

0.89

1

1

23568

24

3

26400

109.591

100

120

66

13

27

64QAM

0.89

1

1

48168

24

6

54450

223.981

200

120

132

13

27

64QAM

0.89

1

1

96264

24

12

108900

447.628

50

120

32

13

27

64QAM

0.89

2

1

47112

24

6

52800

219.071

100

120

66

13

27

64QAM

0.89

2

1

96264

24

12

108900

447.628

200

120

132

13

27

64QAM

0.89

2

1

192624

24

23

217800

895.702

Note 1: Allocated full DL slots are with slot index i, if mod(i,5) = 0,1,2 and i is not in {0,80,81} for i = 0,1,…,159. So total number of allocated slots per 2 frames is 93.

Note 2: MCS Index is based on MCS Table defined in TS38.214 when 256QAM is not enabled.

Note 3: Number of DMRS REs per RB is 12.

Note 4: SS/PBCH block is transmitted in slot #0 with periodicity 20 ms.

Note 5: Overhead parameter for TBS determination is 6.

Note 6: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)