4.4 Modulation

25.2133GPPRelease 17Spreading and modulation (FDD)TS

4.4.1 Modulating chip rate

The modulating chip rate is 3.84 Mcps.

4.4.2 Modulation

Modulation of the complex-valued chip sequence generated by the spreading process is shown below in Figure 7 for a UE with a single configured uplink frequency when UL_CLTD_Enabled is FALSE:

Figure 7: Uplink modulation when a single uplink frequency is configured and UL_CLTD_Enabled is FALSE

An example of uplink modulation for a UE with adjacent primary and secondary uplink frequencies is given in Annex B. An example of uplink modulation for a UE with primary and secondary uplink frequencies in two different bands is given in Annex B2. The pulse-shaping characteristics are described in [3].

An example of uplink modulation for a UE when a single uplink frequency is configured and UL_CLTD_Enabled is TRUE is given in Annex B1. The pulse-shaping characteristics are described in [3].