7 Physical layer procedures

25.2023GPP7.68 Mcps Time Division Duplex (TDD) optionOverall description: Stage 2Release 17TS

Tools: ARFCN - Frequency Conversion for 5G NR/LTE/UMTS/GSM

7.1 Power Control

Transmitter power control, both on the uplink and downlink, is aligned with that of 3.84Mcps TDD.

7.2 Timing Advance

The timing advance architecture is the same as for 3.84Mcps TDD. The required timing advance, ‘UL Timing Advance’ TA_ul will be represented as a 7 bit number (0-127) and shall be the multiplier of 4 chips which is nearest to the required timing advance.

PUSCH, UL DPCH and HS-SICH are timing advanced. PRACH and E-RUCCH are not timing advanced.

7.3 HSDPA procedures

The HS-DSCH procedure is aligned with 3.84Mcps TDD. When SCTD antenna diversity is applied to HS-PDSCH on the beacon channel, the presence of channelisation code shall implicitly indicate presence of channelisation code .

7.4 Synchronisation procedures

The synchronization procedures are aligned with 3.84Mcps TDD.

7.5 RACH procedures

The RACH procedure is aligned with 3.84Mcps TDD. However, the use of higher layer signaling to indicate that in some frames a timeslot shall be blocked for RACH uplink transmission is not supported.

7.6 Discontinuous transmission (DTX) procedure

The DTX procedure is aligned with that of 3.84Mcps TDD.

7.7 Downlink transmit diversity procedure

The downlink transmit diversity procedure is aligned with that of 3.84Mcps TDD. In Space Code Transmit Diversity mode the data sequence is spread with the channelisation codes and , the spread sequence on code is then transmitted on the diversity antenna.

7.8 DSCH procedure

Higher layer signaling is used to indicate to the UE the need for PDSCH detection. Physical layer signaling is not used to indicate to the UE the need for PDSCH detection.

7.9 Macrodiversity procedure

The macrodiversity procedure is aligned with that of 3.84Mcps TDD.

7.10 IPDL procedure

The IPDL procedure is aligned with that of 3.84Mcps TDD.

7.11 E-DCH procedures

The E-DCH procedures are aligned with those of 3.84Mcps TDD with modifications to accommodate SF32 for the E-PUCH code hopping procedure and the E-PUCH power control procedure.