14.6.7 Conversational / speech / UL:12.2 DL:12.2 kbps / CS RAB + Streaming / unknown / UL:128 DL: [guaranteed 128, max bit rate depending on UE category] kbps / PS RAB + Interactive or background / UL:128 DL: [max bit rate depending on UE category] / PS RAB + UL:3.4 DL:3.4 kbps SRBs for DCCH
34.123-13GPPPart 1: Protocol conformance specificationRelease 15TSUser Equipment (UE) conformance specification
14.6.7.1 Conformance requirement
See 14.6.1.1.
14.6.7.2 Test purpose
To verify radio bearer establishment and correct data transfer for reference radio bearer configuration as specified in TS 34.108, clause 6.10.2.4.5.7.
14.6.7.3 Method of test
NOTE: The reference to UE Categories refers to the UE capability as signalled in the Rel-5 IE “HS-DSCH physical layer category” (1 to 12). All UEs supporting HS-DSCH should signal a category between 1 and 12 for this IE even if the UE physical capability category is above 12. This IE corresponds to the HS-DSCH category supported by the UE when MAC-ehs is not configured.
The generic test procedure in 14.1.3.5 is run for each sub-test.
Uplink TFS:
TFI |
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
RB8 (Streaming 128 kbps, 20ms) |
RB9 (I/B 128 kbps, 20ms) |
DCCH |
|
TFS |
TF0, bits |
0x81 |
0x103 |
0x60 |
0x656 |
0x336 |
0x148 |
TF1, bits |
1×39 |
1×103 |
1×60 |
1×656 |
1×336 |
1×148 |
|
TF2, bits |
1×81 |
N/A |
N/A |
2×656 |
2×336 |
N/A |
|
TF3, bits |
N/A |
N/A |
N/A |
4×656 |
4×336 |
N/A |
|
TF4, bits |
N/A |
N/A |
N/A |
N/A |
8×336 |
N/A |
Uplink TFCS:
TFCI |
(RB5 + RB6 + RB7 + RB8 + RB9, DCCH) |
UL_TFC0 |
(TF0,TF0,TF0,TF0,TF0,TF0) |
UL_TFC1 |
(TF1,TF0,TF0,TF0,TF0,TF0) |
UL_TFC2 |
(TF2,TF1,TF1,TF0,TF0,TF0) |
UL_TFC3 |
(TF0,TF0,TF0,TF1,TF0,TF0) |
UL_TFC4 |
(TF0,TF0,TF0,TF0,TF1,TF0) |
UL_TFC5 |
(TF0,TF0,TF0,TF2,TF1,TF0) |
UL_TFC6 |
(TF1,TF0,TF0,TF2,TF1,TF0) |
UL_TFC7 |
(TF2,TF1,TF1,TF2,TF1,TF0) |
UL_TFC8 |
(TF0,TF0,TF0,TF3,TF1,TF0) |
UL_TFC9 |
(TF1,TF0,TF0,TF3,TF1,TF0) |
UL_TFC10 |
(TF2,TF1,TF1,TF3,TF1,TF0) |
UL_TFC11 |
(TF0,TF0,TF0,TF2,TF2,TF0) |
UL_TFC12 |
(TF1,TF0,TF0,TF2,TF2,TF0) |
UL_TFC13 |
(TF2,TF1,TF1,TF2,TF2,TF0) |
UL_TFC14 |
(TF0,TF0,TF0,TF3,TF2,TF0) |
UL_TFC15 |
(TF1,TF0,TF0,TF3,TF2,TF0) |
UL_TFC16 |
(TF2,TF1,TF1,TF3,TF2,TF0) |
UL_TFC17 |
(TF0,TF0,TF0,TF1,TF3,TF0) |
UL_TFC18 |
(TF1,TF0,TF0,TF1,TF3,TF0) |
UL_TFC19 |
(TF2,TF1,TF1,TF1,TF3,TF0) |
UL_TFC20 |
(TF0,TF0,TF0,TF2,TF3,TF0) |
UL_TFC21 |
(TF1,TF0,TF0,TF2,TF3,TF0) |
UL_TFC22 |
(TF2,TF1,TF1,TF2,TF3,TF0) |
UL_TFC23 |
(TF0,TF0,TF0,TF3,TF3,TF0) |
UL_TFC24 |
(TF1,TF0,TF0,TF3,TF3,TF0) |
UL_TFC25 |
(TF2,TF1,TF1,TF3,TF3,TF0) |
UL_TFC26 |
(TF0,TF0,TF0,TF2,TF4,TF0) |
UL_TFC27 |
(TF1,TF0,TF0,TF2,TF4,TF0) |
UL_TFC28 |
(TF2,TF1,TF1,TF2,TF4,TF0) |
UL_TFC29 |
(TF0,TF0,TF0,TF3,TF4,TF0) |
UL_TFC30 |
(TF1,TF0,TF0,TF3,TF4,TF0) |
UL_TFC31 |
(TF2,TF1,TF1,TF3,TF4,TF0) |
UL_TFC32 |
(TF0,TF0,TF0,TF0,TF0,TF1) |
UL_TFC33 |
(TF1,TF0,TF0,TF0,TF0,TF1) |
UL_TFC34 |
(TF2,TF1,TF1,TF0,TF0,TF1) |
UL_TFC35 |
(TF0,TF0,TF0,TF2,TF1,TF1) |
UL_TFC36 |
(TF1,TF0,TF0,TF2,TF1,TF1) |
UL_TFC37 |
(TF2,TF1,TF1,TF2,TF1,TF1) |
UL_TFC38 |
(TF0,TF0,TF0,TF3,TF1,TF1) |
UL_TFC39 |
(TF1,TF0,TF0,TF3,TF1,TF1) |
UL_TFC40 |
(TF2,TF1,TF1,TF3,TF1,TF1) |
UL_TFC41 |
(TF0,TF0,TF0,TF2,TF2,TF1) |
UL_TFC42 |
(TF1,TF0,TF0,TF2,TF2,TF1) |
UL_TFC43 |
(TF2,TF1,TF1,TF2,TF2,TF1) |
UL_TFC44 |
(TF0,TF0,TF0,TF3,TF2,TF1) |
UL_TFC45 |
(TF1,TF0,TF0,TF3,TF2,TF1) |
UL_TFC46 |
(TF2,TF1,TF1,TF3,TF2,TF1) |
UL_TFC47 |
(TF0,TF0,TF0,TF1,TF3,TF1) |
UL_TFC48 |
(TF1,TF0,TF0,TF1,TF3,TF1) |
UL_TFC49 |
(TF2,TF1,TF1,TF1,TF3,TF1) |
UL_TFC50 |
(TF0,TF0,TF0,TF2,TF3,TF1) |
UL_TFC51 |
(TF1,TF0,TF0,TF2,TF3,TF1) |
UL_TFC52 |
(TF2,TF1,TF1,TF2,TF3,TF1) |
UL_TFC53 |
(TF0,TF0,TF0,TF3,TF3,TF1) |
UL_TFC54 |
(TF1,TF0,TF0,TF3,TF3,TF1) |
UL_TFC55 |
(TF2,TF1,TF1,TF3,TF3,TF1) |
UL_TFC56 |
(TF0,TF0,TF0,TF2,TF4,TF1) |
UL_TFC57 |
(TF1,TF0,TF0,TF2,TF4,TF1) |
UL_TFC58 |
(TF2,TF1,TF1,TF2,TF4,TF1) |
UL_TFC59 |
(TF0,TF0,TF0,TF3,TF4,TF1) |
UL_TFC60 |
(TF1,TF0,TF0,TF3,TF4,TF1) |
UL_TFC61 |
(TF2,TF1,TF1,TF3,TF4,TF1) |
Downlink TFS:
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
DCCH |
||
TFS |
TF0, bits |
1×0 |
0x103 |
0x60 |
0x148 |
TF1, bits |
1×39 |
1×103 |
1×60 |
1×148 |
|
TF2, bits |
1×81 |
N/A |
N/A |
N/A |
Downlink TFCS:
TFCI |
(RB5, RB6, RB7, DCCH) |
DL_TFC0 |
(TF0, TF0, TF0, TF0) |
DL_TFC1 |
(TF1, TF0, TF0, TF0) |
DL_TFC2 |
(TF2, TF1, TF1, TF0) |
DL_TFC3 |
(TF0, TF0, TF0, TF1) |
DL_TFC4 |
(TF1, TF0, TF0, TF1) |
DL_TFC5 |
(TF2, TF1, TF1, TF1) |
Sub-tests:
The principle used to select sub-tests has been to cover all uplink and downlink TFS for the Speech + Streaming + Interactive Background PS radio bearer. The CS speech 12.2 kbps + Streaming UL:128 kbps + Interactive Background UL:128 kbps radio bearer (RB5+RB6+RB7+RB8+RB9) have 62 transport format combinations. As the transport formats where RB5, RB6, RB7, RB8, RB9 or DCCH has no data (TF0 for RB5, RB6, RB7, RB8, RB9 or DCCH) is considered as implicitly tested when the transport format combinations with data is tested then no specific sub-tests for those transport format combinations have been specified. The selected UL TFCI to achieve test coverage of TF1 to TF3 for RB8 and TF1 to TF4 for RB9 are: UL_TFC3, UL_TFC6 to UL_TFC7, UL_TFC9 to UL_TFC10, UL_TFC11 to UL_TFC12, UL_TFC15 to UL_TFC16, UL_TFC18 to UL_TFC19, UL_TFC21 to UL_TFC22, UL_TFC24 to UL_TFC25, UL_TFC27 to UL_TFC28 and UL_TFC30 to UL_TFC31.
Sub-tes |
UE Category |
Number of HARQ processes |
RLC Receiving window size (note 1) |
RLC Trans-mission window size (note 1) |
MAC-d PDU size (bits) |
Downlink TFCS Under test |
Uplink TFCS Under test |
Implicitly tested |
Restricted UL TFCIs (note 2) |
UL RLC SDU size (bits) (note 3) |
Test data size (bits) (note 4) |
---|---|---|---|---|---|---|---|---|---|---|---|
1 |
1 |
2 |
256 |
128 |
656 |
DL_TFC1 |
UL_TFC6 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC5 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC5, UL_TFC6, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 RB9: 312 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
128 |
||||||||
3 |
3 |
256 |
128 |
||||||||
4 |
3 |
256 |
128 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
6 |
256 |
256 |
||||||||
7 |
6 |
512 |
512 |
||||||||
8 |
6 |
512 |
512 |
||||||||
9 |
6 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
6 |
512 |
128 |
||||||||
2 |
1 |
2 |
512 |
256 |
336 |
DL_TFC2 |
UL_TFC7 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC5 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC5, UL_TFC7, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 RB9: 312 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
3 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC9 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC8 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC8, UL_TFC9, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 RB9: 312 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
4 |
1 |
2 |
512 |
256 |
656 |
DL_TFC2 |
UL_TFC10 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC8 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4 , UL_TFC8, UL_TFC10, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 RB9: 312 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
8 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
6 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
5 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC12 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC11 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC11, UL_TFC12, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 RB9: 632 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
8 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
6 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
6 |
1 |
2 |
512 |
256 |
656 |
DL_TFC2 |
UL_TFC13 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC11 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC11, UL_TFC13, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 RB9: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
8 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
6 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
7 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC15 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC14 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC14, UL_TFC15, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 RB9: 632 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
8 |
1 |
2 |
512 |
256 |
656 |
DL_TFC2 |
UL_TFC16 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC14 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC14, UL_TFC16, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 RB9: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
9 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC18 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC17 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC17, UL_TFC18, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 RB9: 1272 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
10 |
1 |
2 |
512 |
256 |
656 |
DL_TFC2 |
UL_TFC19 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC17 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC17, UL_TFC19, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 RB9: 1272 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
11 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC21 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC20 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC20, UL_TFC21, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 RB9: 1272 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
12 |
1 |
2 |
512 |
256 |
656 |
DL_TFC2 |
UL_TFC22 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC20 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC20, UL_TFC22, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 RB9: 1272 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
13 |
1 |
2 |
256 |
256 |
656 |
DL_TFC1 |
UL_TFC24 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC23 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC23, UL_TFC24, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 RB9: 1272 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
14 |
1 |
2 |
512 |
256 |
656 |
DL_TFC1 |
UL_TFC27 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC26 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC26, UL_TFC27, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 RB9: 2552 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
15 |
1 |
2 |
256 |
256 |
656 |
DL_TFC2 |
UL_TFC28 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC26 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC26, UL_TFC28, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 RB9: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
16 |
1 |
2 |
512 |
256 |
656 |
DL_TFC1 |
UL_TFC30 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC1, UL_TFC29 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC29, UL_TFC30, UL_TFC32 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 RB9: 2552 |
RB5: 39 RB6: No data RB7: No data RB8, RB9: |
2 |
2 |
512 |
256 |
||||||||
3 |
3 |
512 |
256 |
||||||||
4 |
3 |
512 |
256 |
||||||||
5 |
6 |
512 |
256 |
||||||||
6 |
8 |
512 |
256 |
||||||||
7 |
8 |
1536 |
512 |
||||||||
8 |
8 |
1536 |
512 |
||||||||
9 |
8 |
2047 |
512 |
||||||||
10 |
6 |
2047 |
1024 |
||||||||
11 |
3 |
1024 |
128 |
||||||||
12 |
8 |
1024 |
128 |
||||||||
17 |
1 |
2 |
256 |
256 |
656 |
DL_TFC2 |
UL_TFC31 |
DL_TFC0, DL_TFC3, UL_TFC0, UL_TFC2, UL_TFC29 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC29, UL_TFC31, UL_TFC32 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 RB9: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8, RB9: |
2 |
2 |
256 |
256 |
||||||||
3 |
3 |
256 |
256 |
||||||||
4 |
3 |
256 |
256 |
||||||||
5 |
6 |
256 |
256 |
||||||||
6 |
8 |
256 |
256 |
||||||||
7 |
8 |
512 |
512 |
||||||||
8 |
8 |
512 |
512 |
||||||||
9 |
8 |
1024 |
512 |
||||||||
10 |
6 |
1024 |
1024 |
||||||||
11 |
3 |
512 |
128 |
||||||||
12 |
8 |
512 |
128 |
||||||||
NOTE 1: The SS shall configure the RLC transmission and receiver window size depending on the UE category. The values are set to cope with the number of SDUs used in the sub-test and within the UE capabilities for the actual UE category under test. NOTE 2: UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4 and UL_TFC32 are part of minimum set of TFCIs. NOTE 3: See TS 34.109 [10] clause 5.3.2.6.2 for details regarding loopback of RLC SDUs. NOTE 4: The test data size for RB5 and RB6 is dependent on the actual TFRC test point, see the generic test procedure in 14.1.3.5. |
14.6.7.4 Test requirements
See 14.1.3.5 for definition of the referenced step numbers.
1. At step 12 the UE shall send RADIO BEARER SETUP COMPLETE.
2. At steps 17 to 20 the UE transmitted transport format shall be within the set of restricted TFCIs as specified for the actual sub-test.
3. At step 18 and for each TFRC test point:
If the downlink RLC SDU size is less than the configured UL RLC SDU for the actual sub-test then the UE shall return 4 RLC SDUs where the first bits of each SDU has the same content as the RLC SDUs sent by the SS in downlink. Otherwise the UE shall return 4 RLC SDUs where each SDU has the same content as the first bits of the RLC SDUs sent by the SS in downlink.
NOTE: The generic test procedure as specified in 14.1.3.5.2 sends 4 SDUs of size (NPDUs * MAC-d PDU payload size) / 4 minus 8 bits (size of 7 bit length indicator and expansion bit). For the case when the downlink SDU size is less than the configured UL SDU size then all data is returned otherwise the returned data is truncated.