14.2.44 Conversational / speech / UL:12.2 DL:12.2 kbps / CS RAB + Interactive or background / UL:128 DL:2048 kbps / PS RAB + UL:3.4 DL:3.4 kbps SRBs for DCCH
34.123-13GPPPart 1: Protocol conformance specificationRelease 15TSUser Equipment (UE) conformance specification
14.2.44.1 Conversational / speech / UL:12.2 DL:12.2 kbps / CS RAB + Interactive or background / UL:128 DL:2048 kbps / PS RAB / 10 ms TTI
14.2.44.1.1 Conformance requirement
See 14.2.4.1.
14.2.44.1.2 Test purpose
Test to verify establishment and data transfer of reference radio bearer configuration as specified in TS 34.108, clause 6.10.2.4.1.44 for the downlink 10 ms TTI case.
14.2.44.1.3 Method of test
See 14.1.2 for test procedure.
Uplink TFS:
|
TFI |
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
RB8 (128 kbps) |
DCCH |
|
|
TFS |
TF0, bits |
0x81 |
0x103 |
0x60 |
0x336 |
0x148 |
|
TF1, bits |
1×39 |
1×103 |
1×60 |
1×336 |
1×148 |
|
|
TF2, bits |
1×81 |
N/A |
N/A |
2×336 |
N/A |
|
|
TF3, bits |
N/A |
N/A |
N/A |
4×336 |
N/A |
|
|
TF4, bits |
N/A |
N/A |
N/A |
8×336 |
N/A |
Uplink TFCS:
|
TFCI |
(RB5, RB6, RB7, RB8, DCCH) |
|
UL_TFC0 |
(TF0, TF0, TF0, TF0, TF0) |
|
UL_TFC1 |
(TF1, TF0, TF0, TF0, TF0) |
|
UL_TFC2 |
(TF2, TF1, TF1, TF0, TF0) |
|
UL_TFC3 |
(TF0, TF0, TF0, TF1, TF0) |
|
UL_TFC4 |
(TF1, TF0, TF0, TF1, TF0) |
|
UL_TFC5 |
(TF2, TF1, TF1, TF1, TF0) |
|
UL_TFC6 |
(TF0, TF0, TF0, TF2, TF0) |
|
UL_TFC7 |
(TF1, TF0, TF0, TF2, TF0) |
|
UL_TFC8 |
(TF2, TF1, TF1, TF2, TF0) |
|
UL_TFC9 |
(TF0, TF0, TF0, TF3, TF0) |
|
UL_TFC10 |
(TF1, TF0, TF0, TF3, TF0) |
|
UL_TFC11 |
(TF2, TF1, TF1, TF3, TF0) |
|
UL_TFC12 |
(TF0, TF0, TF0, TF4, TF0) |
|
UL_TFC13 |
(TF1, TF0, TF0, TF4, TF0) |
|
UL_TFC14 |
(TF2, TF1, TF1, TF4, TF0) |
|
UL_TFC15 |
(TF0, TF0, TF0, TF0, TF1) |
|
UL_TFC16 |
(TF1, TF0, TF0, TF0, TF1) |
|
UL_TFC17 |
(TF2, TF1, TF1, TF0, TF1) |
|
UL_TFC18 |
(TF0, TF0, TF0, TF1, TF1) |
|
UL_TFC19 |
(TF1, TF0, TF0, TF1, TF1) |
|
UL_TFC20 |
(TF2, TF1, TF1, TF1, TF1) |
|
UL_TFC21 |
(TF0, TF0, TF0, TF2, TF1) |
|
UL_TFC22 |
(TF1, TF0, TF0, TF2, TF1) |
|
UL_TFC23 |
(TF2, TF1, TF1, TF2, TF1) |
|
UL_TFC24 |
(TF0, TF0, TF0, TF3, TF1) |
|
UL_TFC25 |
(TF1, TF0, TF0, TF3, TF1) |
|
UL_TFC26 |
(TF2, TF1, TF1, TF3, TF1) |
|
UL_TFC27 |
(TF0, TF0, TF0, TF4, TF1) |
|
UL_TFC28 |
(TF1, TF0, TF0, TF4, TF1) |
|
UL_TFC29 |
(TF2, TF1, TF1, TF4, TF1) |
Downlink TFS:
|
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
RB8 (2048 kbps) |
DCCH |
||
|
TFS |
TF0, bits |
1×0 |
0x103 |
0x60 |
0x656 |
0x148 |
|
TF1, bits |
1×39 |
1×103 |
1×60 |
1×656 |
1×148 |
|
|
TF2, bits |
1×81 |
N/A |
N/A |
2×656 |
N/A |
|
|
TF3, bits |
N/A |
N/A |
N/A |
4×656 |
N/A |
|
|
TF4, bits |
N/A |
N/A |
N/A |
8×656 |
N/A |
|
|
TF5, bits |
N/A |
N/A |
N/A |
12×656 |
N/A |
|
|
TF6, bits |
N/A |
N/A |
N/A |
16×656 |
N/A |
|
|
TF7, bits |
N/A |
N/A |
N/A |
20×656 |
N/A |
|
|
TF8, bits |
N/A |
N/A |
N/A |
24×656 |
N/A |
|
|
TF9, bits |
N/A |
N/A |
N/A |
28×656 |
N/A |
|
|
TF10, bits |
N/A |
N/A |
N/A |
32×656 |
N/A |
Downlink TFCS:
|
TFCI |
(RB5, RB6, RB7, RB8, DCCH) |
|---|---|
|
DL_TFC0 |
(TF0, TF0, TF0, TF0, TF0) |
|
DL_TFC1 |
(TF1, TF0, TF0, TF0, TF0) |
|
DL_TFC2 |
(TF2, TF1, TF1, TF0, TF0) |
|
DL_TFC3 |
(TF0, TF0, TF0, TF1, TF0) |
|
DL_TFC4 |
(TF1, TF0, TF0, TF1, TF0) |
|
DL_TFC5 |
(TF2, TF1, TF1, TF1, TF0) |
|
DL_TFC6 |
(TF0, TF0, TF0, TF2, TF0) |
|
DL_TFC7 |
(TF1, TF0, TF0, TF2, TF0) |
|
DL_TFC8 |
(TF2, TF1, TF1, TF2, TF0) |
|
DL_TFC9 |
(TF0, TF0, TF0, TF3, TF0) |
|
DL_TFC10 |
(TF1, TF0, TF0, TF3, TF0) |
|
DL_TFC11 |
(TF2, TF1, TF1, TF3, TF0) |
|
DL_TFC12 |
(TF0, TF0, TF0, TF4, TF0) |
|
DL_TFC13 |
(TF1, TF0, TF0, TF4, TF0) |
|
DL_TFC14 |
(TF2, TF1, TF1, TF4, TF0) |
|
DL_TFC15 |
(TF0, TF0, TF0, TF5, TF0) |
|
DL_TFC16 |
(TF1, TF0, TF0, TF5, TF0) |
|
DL_TFC17 |
(TF2, TF1, TF1, TF5, TF0) |
|
DL_TFC18 |
(TF0, TF0, TF0, TF6, TF0) |
|
DL_TFC19 |
(TF1, TF0, TF0, TF6, TF0) |
|
DL_TFC20 |
(TF2, TF1, TF1, TF6, TF0) |
|
DL_TFC21 |
(TF0, TF0, TF0, TF7, TF0) |
|
DL_TFC22 |
(TF1, TF0, TF0, TF7, TF0) |
|
DL_TFC23 |
(TF2, TF1, TF1, TF7, TF0) |
|
DL_TFC24 |
(TF0, TF0, TF0, TF8, TF0) |
|
DL_TFC25 |
(TF1, TF0, TF0, TF8, TF0) |
|
DL_TFC26 |
(TF2, TF1, TF1, TF8, TF0) |
|
DL_TFC27 |
(TF0, TF0, TF0, TF9, TF0) |
|
DL_TFC28 |
(TF1, TF0, TF0, TF9, TF0) |
|
DL_TFC29 |
(TF2, TF1, TF1, TF9, TF0) |
|
DL_TFC30 |
(TF0, TF0, TF0, TF10, TF0) |
|
DL_TFC31 |
(TF1, TF0, TF0, TF10, TF0) |
|
DL_TFC32 |
(TF2, TF1, TF1, TF10, TF0) |
|
DL_TFC33 |
(TF0, TF0, TF0, TF0, TF1) |
|
DL_TFC34 |
(TF1, TF0, TF0, TF0, TF1) |
|
DL_TFC35 |
(TF2, TF1, TF1, TF0, TF1) |
|
DL_TFC36 |
(TF0, TF0, TF0, TF1, TF1) |
|
DL_TFC37 |
(TF1, TF0, TF0, TF1, TF1) |
|
DL_TFC38 |
(TF2, TF1, TF1, TF1, TF1) |
|
DL_TFC39 |
(TF0, TF0, TF0, TF2, TF1) |
|
DL_TFC40 |
(TF1, TF0, TF0, TF2, TF1) |
|
DL_TFC41 |
(TF2, TF1, TF1, TF2, TF1) |
|
DL_TFC42 |
(TF0, TF0, TF0, TF3, TF1) |
|
DL_TFC43 |
(TF1, TF0, TF0, TF3, TF1) |
|
DL_TFC44 |
(TF2, TF1, TF1, TF3, TF1) |
|
DL_TFC45 |
(TF0, TF0, TF0, TF4, TF1) |
|
DL_TFC46 |
(TF1, TF0, TF0, TF4, TF1) |
|
DL_TFC47 |
(TF2, TF1, TF1, TF4, TF1) |
|
DL_TFC48 |
(TF0, TF0, TF0, TF5, TF1) |
|
DL_TFC49 |
(TF1, TF0, TF0, TF5, TF1) |
|
DL_TFC50 |
(TF2, TF1, TF1, TF5, TF1) |
|
DL_TFC51 |
(TF0, TF0, TF0, TF6, TF1) |
|
DL_TFC52 |
(TF1, TF0, TF0, TF6, TF1) |
|
DL_TFC53 |
(TF2, TF1, TF1, TF6, TF1) |
|
DL_TFC54 |
(TF0, TF0, TF0, TF7, TF1) |
|
DL_TFC55 |
(TF1, TF0, TF0, TF7, TF1) |
|
DL_TFC56 |
(TF2, TF1, TF1, TF7, TF1) |
|
DL_TFC57 |
(TF0, TF0, TF0, TF8, TF1) |
|
DL_TFC58 |
(TF1, TF0, TF0, TF8, TF1) |
|
DL_TFC59 |
(TF2, TF1, TF1, TF8, TF1) |
|
DL_TFC60 |
(TF0, TF0, TF0, TF9, TF1) |
|
DL_TFC61 |
(TF1, TF0, TF0, TF9, TF1) |
|
DL_TFC62 |
(TF2, TF1, TF1, TF9, TF1) |
|
DL_TFC63 |
(TF0, TF0, TF0, TF10, TF1) |
|
DL_TFC64 |
(TF1, TF0, TF0, TF10, TF1) |
|
DL_TFC65 |
(TF2, TF1, TF1, TF10, TF1) |
Sub-tests:
|
Sub-test |
Downlink TFCS under test |
Uplink TFCS Under test |
Implicitly tested |
Restricted UL TFCIs (note 1) |
UL RLC SDU size (bits) (note 2) |
Test data size (bits) (note 2) |
|---|---|---|---|---|---|---|
|
1 |
DL_TFC1, DL_TFC34 |
UL_TFC1, UL_TFC16 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC16 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: 39 RB6: No data RB7: No data RB8: No data |
|
2 |
DL_TFC2, DL_TFC35 |
UL_TFC2, UL_TFC17 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC17 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8: No data |
|
3 |
DL_TFC3, DL_TFC36 |
UL_TFC3, UL_TFC18 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC18 |
RB5: 39 RB6: 103 RB7: 60 RB8: 312 |
RB5: No data RB6: No data RB7: No data RB8: 632 |
|
4 |
DL_TFC4, DL_TFC37 |
UL_TFC4, UL_TFC19 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC15, UL_TFC16, UL_TFC18, UL_TFC19 |
RB5: 39 RB6: 103 RB7: 60 RB8: 312 |
RB5: 39 RB6: No data RB7: No data RB8: 632 |
|
5 |
DL_TFC5, DL_TFC38 |
UL_TFC5, UL_TFC20 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC5, UL_TFC15, UL_TFC17, UL_TFC18, UL_TFC20 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
|
6 |
DL_TFC6, DL_TFC39 |
UL_TFC6, UL_TFC21 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC15, UL_TFC21 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: No data RB6: No data RB7: No data RB8: 1272 |
|
7 |
DL_TFC7, DL_TFC40 |
UL_TFC7, UL_TFC22 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC7, UL_TFC15, UL_TFC16, UL_TFC21, UL_TFC22 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: 39 RB6: No data RB7: No data RB8: 1272 |
|
8 |
DL_TFC8, DL_TFC41 |
UL_TFC8, UL_TFC23 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC8, UL_TFC15, UL_TFC17, UL_TFC21, UL_TFC23 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 |
|
9 |
DL_TFC9, DL_TFC42 |
UL_TFC9, UL_TFC24 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9, UL_TFC15, UL_TFC24 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 |
RB5: No data RB6: No data RB7: No data RB8: 2552 |
|
10 |
DL_TFC10, DL_TFC43 |
UL_TFC10, UL_TFC25 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9, UL_TFC10, UL_TFC15, UL_TFC16, UL_TFC24, UL_TFC25 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 |
RB5: 39 RB6: No data RB7: No data RB8: 2552 |
|
11 |
DL_TFC11, DL_TFC44 |
UL_TFC11, UL_TFC26 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9, UL_TFC11, UL_TFC15, UL_TFC17, UL_TFC24, UL_TFC26 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
|
12 |
DL_TFC12, DL_TFC45 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 5112 |
|
13 |
DL_TFC13, DL_TFC46 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 5112 |
|
14 |
DL_TFC14, DL_TFC47 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27 UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 5112 |
|
15 |
DL_TFC15, DL_TFC48 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 7672 |
|
16 |
DL_TFC16, DL_TFC49 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 7672 |
|
17 |
DL_TFC17, DL_TFC50 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 7672 |
|
18 |
DL_TFC18, DL_TFC51 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 10232 |
|
19 |
DL_TFC19, DL_TFC52 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 10232 |
|
20 |
DL_TFC20, DL_TFC53 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 10232 |
|
21 |
DL_TFC21, DL_TFC54 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 12792 |
|
22 |
DL_TFC22, DL_TFC55 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 12792 |
|
23 |
DL_TFC23, DL_TFC56 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 12792 |
|
24 |
DL_TFC24, DL_TFC57 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 15352 |
|
25 |
DL_TFC25, DL_TFC58 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 15352 |
|
26 |
DL_TFC26, DL_TFC59 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 15352 |
|
27 |
DL_TFC27, DL_TFC60 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 17912 |
|
28 |
DL_TFC28, DL_TFC61 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 17912 |
|
29 |
DL_TFC29, DL_TFC62 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27 UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 17912 |
|
30 |
DL_TFC30, DL_TFC63 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 20472 |
|
31 |
DL_TFC31, DL_TFC64 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 20472 |
|
32 |
DL_TFC32, DL_TFC65 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC33, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27 UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 20472 |
|
NOTE 1: UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3 and UL_TFC15 are part of minimum set of TFCIs. NOTE 2: See TS 34.109 [10] clause 5.3.2.6.2 for details regarding loopback of RLC SDUs. |
||||||
14.2.44.1.4 Test requirements
See 14.1.2 for definition of step 10 and step 15.
1. At step 10 the UE shall send RADIO BEARER SETUP COMPLETE.
2. At step 15a and step 15b the UE transmitted transport format shall be within the set of restricted TFCIs as specified for the actual sub-test.
3. At step 15 the UE shall return
– for sub-test 1: RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6, RB7 and RB8.
– for sub-test 2: RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS; and no data shall be received on RB8.
– for sub-test 3: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 4: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 5: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 6: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 7: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 8: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 9: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 10: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 11: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 12: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 13: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 14: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 15: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 16: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 17: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 18: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 19: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 20: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 21: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 22: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 23: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 24: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 25: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 26: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 27: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 28: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 29: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 30: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 31: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 32: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
4. At step 15b the UE shall send at least one MEASUREMENT REPORT message.
14.2.44.2 Conversational / speech / UL:12.2 DL:12.2 kbps / CS RAB + Interactive or background / UL:128 DL:2048 kbps / PS RAB / 20 ms TTI
14.2.44.2.1 Conformance requirement
See 14.2.4.1.
14.2.44.2.2 Test purpose
Test to verify establishment and data transfer of reference radio bearer configuration as specified in TS 34.108, clause 6.10.2.4.1.44 for the downlink 20 ms TTI case.
14.2.44.2.3 Method of test
See 14.1.2 for test procedure.
Uplink TFS:
|
TFI |
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
RB8 (128 kbps) |
DCCH |
|
|
TFS |
TF0, bits |
0x81 |
0x103 |
0x60 |
0x336 |
0x148 |
|
TF1, bits |
1×39 |
1×103 |
1×60 |
1×336 |
1×148 |
|
|
TF2, bits |
1×81 |
N/A |
N/A |
2×336 |
N/A |
|
|
TF3, bits |
N/A |
N/A |
N/A |
4×336 |
N/A |
|
|
TF4, bits |
N/A |
N/A |
N/A |
8×336 |
N/A |
Uplink TFCS:
|
TFCI |
(RB5, RB6, RB7, RB8, DCCH) |
|
UL_TFC0 |
(TF0, TF0, TF0, TF0, TF0) |
|
UL_TFC1 |
(TF1, TF0, TF0, TF0, TF0) |
|
UL_TFC2 |
(TF2, TF1, TF1, TF0, TF0) |
|
UL_TFC3 |
(TF0, TF0, TF0, TF1, TF0) |
|
UL_TFC4 |
(TF1, TF0, TF0, TF1, TF0) |
|
UL_TFC5 |
(TF2, TF1, TF1, TF1, TF0) |
|
UL_TFC6 |
(TF0, TF0, TF0, TF2, TF0) |
|
UL_TFC7 |
(TF1, TF0, TF0, TF2, TF0) |
|
UL_TFC8 |
(TF2, TF1, TF1, TF2, TF0) |
|
UL_TFC9 |
(TF0, TF0, TF0, TF3, TF0) |
|
UL_TFC10 |
(TF1, TF0, TF0, TF3, TF0) |
|
UL_TFC11 |
(TF2, TF1, TF1, TF3, TF0) |
|
UL_TFC12 |
(TF0, TF0, TF0, TF4, TF0) |
|
UL_TFC13 |
(TF1, TF0, TF0, TF4, TF0) |
|
UL_TFC14 |
(TF2, TF1, TF1, TF4, TF0) |
|
UL_TFC15 |
(TF0, TF0, TF0, TF0, TF1) |
|
UL_TFC16 |
(TF1, TF0, TF0, TF0, TF1) |
|
UL_TFC17 |
(TF2, TF1, TF1, TF0, TF1) |
|
UL_TFC18 |
(TF0, TF0, TF0, TF1, TF1) |
|
UL_TFC19 |
(TF1, TF0, TF0, TF1, TF1) |
|
UL_TFC20 |
(TF2, TF1, TF1, TF1, TF1) |
|
UL_TFC21 |
(TF0, TF0, TF0, TF2, TF1) |
|
UL_TFC22 |
(TF1, TF0, TF0, TF2, TF1) |
|
UL_TFC23 |
(TF2, TF1, TF1, TF2, TF1) |
|
UL_TFC24 |
(TF0, TF0, TF0, TF3, TF1) |
|
UL_TFC25 |
(TF1, TF0, TF0, TF3, TF1) |
|
UL_TFC26 |
(TF2, TF1, TF1, TF3, TF1) |
|
UL_TFC27 |
(TF0, TF0, TF0, TF4, TF1) |
|
UL_TFC28 |
(TF1, TF0, TF0, TF4, TF1) |
|
UL_TFC29 |
(TF2, TF1, TF1, TF4, TF1) |
Downlink TFS:
|
RB5 (RAB subflow #1) |
RB6 (RAB subflow #2) |
RB7 (RAB subflow #3) |
RB8 (2048 kbps) |
DCCH |
||
|
TFS |
TF0, bits |
1×0 |
0x103 |
0x60 |
0x656 |
0x148 |
|
TF1, bits |
1×39 |
1×103 |
1×60 |
1×656 |
1×148 |
|
|
TF2, bits |
1×81 |
N/A |
N/A |
2×656 |
N/A |
|
|
TF3, bits |
N/A |
N/A |
N/A |
4×656 |
N/A |
|
|
TF4, bits |
N/A |
N/A |
N/A |
8×656 |
N/A |
|
|
TF5, bits |
N/A |
N/A |
N/A |
12×656 |
N/A |
|
|
TF6, bits |
N/A |
N/A |
N/A |
16×656 |
N/A |
|
|
TF7, bits |
N/A |
N/A |
N/A |
20×656 |
N/A |
|
|
TF8, bits |
N/A |
N/A |
N/A |
24×656 |
N/A |
|
|
TF9, bits |
N/A |
N/A |
N/A |
28×656 |
N/A |
|
|
TF10, bits |
N/A |
N/A |
N/A |
32×656 |
N/A |
|
|
TF11, bits |
N/A |
N/A |
N/A |
36×656 |
N/A |
|
|
TF12, bits |
N/A |
N/A |
N/A |
40×656 |
N/A |
|
|
TF13, bits |
N/A |
N/A |
N/A |
44×656 |
N/A |
|
|
TF14, bits |
N/A |
N/A |
N/A |
48×656 |
N/A |
|
|
TF15, bits |
N/A |
N/A |
N/A |
52×656 |
N/A |
|
|
TF16, bits |
N/A |
N/A |
N/A |
56×656 |
N/A |
|
|
TF17, bits |
N/A |
N/A |
N/A |
60×656 |
N/A |
|
|
TF18, bits |
N/A |
N/A |
N/A |
64×656 |
N/A |
Downlink TFCS:
|
TFCI |
(RB5, RB6, RB7, RB8, DCCH) |
|---|---|
|
DL_TFC0 |
(TF0, TF0, TF0, TF0, TF0) |
|
DL_TFC1 |
(TF1, TF0, TF0, TF0, TF0) |
|
DL_TFC2 |
(TF2, TF1, TF1, TF0, TF0) |
|
DL_TFC3 |
(TF0, TF0, TF0, TF1, TF0) |
|
DL_TFC4 |
(TF1, TF0, TF0, TF1, TF0) |
|
DL_TFC5 |
(TF2, TF1, TF1, TF1, TF0) |
|
DL_TFC6 |
(TF0, TF0, TF0, TF2, TF0) |
|
DL_TFC7 |
(TF1, TF0, TF0, TF2, TF0) |
|
DL_TFC8 |
(TF2, TF1, TF1, TF2, TF0) |
|
DL_TFC9 |
(TF0, TF0, TF0, TF3, TF0) |
|
DL_TFC10 |
(TF1, TF0, TF0, TF3, TF0) |
|
DL_TFC11 |
(TF2, TF1, TF1, TF3, TF0) |
|
DL_TFC12 |
(TF0, TF0, TF0, TF4, TF0) |
|
DL_TFC13 |
(TF1, TF0, TF0, TF4, TF0) |
|
DL_TFC14 |
(TF2, TF1, TF1, TF4, TF0) |
|
DL_TFC15 |
(TF0, TF0, TF0, TF5, TF0) |
|
DL_TFC16 |
(TF1, TF0, TF0, TF5, TF0) |
|
DL_TFC17 |
(TF2, TF1, TF1, TF5, TF0) |
|
DL_TFC18 |
(TF0, TF0, TF0, TF6, TF0) |
|
DL_TFC19 |
(TF1, TF0, TF0, TF6, TF0) |
|
DL_TFC20 |
(TF2, TF1, TF1, TF6, TF0) |
|
DL_TFC21 |
(TF0, TF0, TF0, TF7, TF0) |
|
DL_TFC22 |
(TF1, TF0, TF0, TF7, TF0) |
|
DL_TFC23 |
(TF2, TF1, TF1, TF7, TF0) |
|
DL_TFC24 |
(TF0, TF0, TF0, TF8, TF0) |
|
DL_TFC25 |
(TF1, TF0, TF0, TF8, TF0) |
|
DL_TFC26 |
(TF2, TF1, TF1, TF8, TF0) |
|
DL_TFC27 |
(TF0, TF0, TF0, TF9, TF0) |
|
DL_TFC28 |
(TF1, TF0, TF0, TF9, TF0) |
|
DL_TFC29 |
(TF2, TF1, TF1, TF9, TF0) |
|
DL_TFC30 |
(TF0, TF0, TF0, TF10, TF0) |
|
DL_TFC31 |
(TF1, TF0, TF0, TF10, TF0) |
|
DL_TFC32 |
(TF2, TF1, TF1, TF10, TF0) |
|
DL_TFC33 |
(TF0, TF0, TF0, TF11, TF0) |
|
DL_TFC34 |
(TF1, TF0, TF0, TF11, TF0) |
|
DL_TFC35 |
(TF2, TF1, TF1, TF11, TF0) |
|
DL_TFC36 |
(TF0, TF0, TF0, TF12, TF0) |
|
DL_TFC37 |
(TF1, TF0, TF0, TF12, TF0) |
|
DL_TFC38 |
(TF2, TF1, TF1, TF12, TF0) |
|
DL_TFC39 |
(TF0, TF0, TF0, TF13, TF0) |
|
DL_TFC40 |
(TF1, TF0, TF0, TF13, TF0) |
|
DL_TFC41 |
(TF2, TF1, TF1, TF13, TF0) |
|
DL_TFC42 |
(TF0, TF0, TF0, TF14, TF0) |
|
DL_TFC43 |
(TF1, TF0, TF0, TF14, TF0) |
|
DL_TFC44 |
(TF2, TF1, TF1, TF14, TF0) |
|
DL_TFC45 |
(TF0, TF0, TF0, TF15, TF0) |
|
DL_TFC46 |
(TF1, TF0, TF0, TF15, TF0) |
|
DL_TFC47 |
(TF2, TF1, TF1, TF15, TF0) |
|
DL_TFC48 |
(TF0, TF0, TF0, TF16, TF0) |
|
DL_TFC49 |
(TF1, TF0, TF0, TF16, TF0) |
|
DL_TFC50 |
(TF2, TF1, TF1, TF16, TF0) |
|
DL_TFC51 |
(TF0, TF0, TF0, TF17, TF0) |
|
DL_TFC52 |
(TF1, TF0, TF0, TF17, TF0) |
|
DL_TFC53 |
(TF2, TF1, TF1, TF17, TF0) |
|
DL_TFC54 |
(TF0, TF0, TF0, TF18, TF0) |
|
DL_TFC55 |
(TF1, TF0, TF0, TF18, TF0) |
|
DL_TFC56 |
(TF2, TF1, TF1, TF18, TF0) |
|
DL_TFC57 |
(TF0, TF0, TF0, TF0, TF1) |
|
DL_TFC58 |
(TF1, TF0, TF0, TF0, TF1) |
|
DL_TFC59 |
(TF2, TF1, TF1, TF0, TF1) |
|
DL_TFC60 |
(TF0, TF0, TF0, TF1, TF1) |
|
DL_TFC61 |
(TF1, TF0, TF0, TF1, TF1) |
|
DL_TFC61 |
(TF2, TF1, TF1, TF1, TF1) |
|
DL_TFC63 |
(TF0, TF0, TF0, TF2, TF1) |
|
DL_TFC64 |
(TF1, TF0, TF0, TF2, TF1) |
|
DL_TFC65 |
(TF2, TF1, TF1, TF2, TF1) |
|
DL_TFC66 |
(TF0, TF0, TF0, TF3, TF1) |
|
DL_TFC67 |
(TF1, TF0, TF0, TF3, TF1) |
|
DL_TFC68 |
(TF2, TF1, TF1, TF3, TF1) |
|
DL_TFC69 |
(TF0, TF0, TF0, TF4, TF1) |
|
DL_TFC70 |
(TF1, TF0, TF0, TF4, TF1) |
|
DL_TFC71 |
(TF2, TF1, TF1, TF4, TF1) |
|
DL_TFC72 |
(TF0, TF0, TF0, TF5, TF1) |
|
DL_TFC73 |
(TF1, TF0, TF0, TF5, TF1) |
|
DL_TFC74 |
(TF2, TF1, TF1, TF5, TF1) |
|
DL_TFC75 |
(TF0, TF0, TF0, TF6, TF1) |
|
DL_TFC76 |
(TF1, TF0, TF0, TF6, TF1) |
|
DL_TFC77 |
(TF2, TF1, TF1, TF6, TF1) |
|
DL_TFC78 |
(TF0, TF0, TF0, TF7, TF1) |
|
DL_TFC79 |
(TF1, TF0, TF0, TF7, TF1) |
|
DL_TFC80 |
(TF2, TF1, TF1, TF7, TF1) |
|
DL_TFC81 |
(TF0, TF0, TF0, TF8, TF1) |
|
DL_TFC82 |
(TF1, TF0, TF0, TF8, TF1) |
|
DL_TFC83 |
(TF2, TF1, TF1, TF8, TF1) |
|
DL_TFC84 |
(TF0, TF0, TF0, TF9, TF1) |
|
DL_TFC85 |
(TF1, TF0, TF0, TF9, TF1) |
|
DL_TFC86 |
(TF2, TF1, TF1, TF9, TF1) |
|
DL_TFC87 |
(TF0, TF0, TF0, TF10, TF1) |
|
DL_TFC88 |
(TF1, TF0, TF0, TF10, TF1) |
|
DL_TFC89 |
(TF2, TF1, TF1, TF10, TF1) |
|
DL_TFC90 |
(TF0, TF0, TF0, TF11, TF1) |
|
DL_TFC91 |
(TF1, TF0, TF0, TF11, TF1) |
|
DL_TFC92 |
(TF2, TF1, TF1, TF11, TF1) |
|
DL_TFC93 |
(TF0, TF0, TF0, TF12, TF1) |
|
DL_TFC94 |
(TF1, TF0, TF0, TF12, TF1) |
|
DL_TFC95 |
(TF2, TF1, TF1, TF12, TF1) |
|
DL_TFC96 |
(TF0, TF0, TF0, TF13, TF1) |
|
DL_TFC97 |
(TF1, TF0, TF0, TF13, TF1) |
|
DL_TFC98 |
(TF2, TF1, TF1, TF13, TF1) |
|
DL_TFC99 |
(TF0, TF0, TF0, TF14, TF1) |
|
DL_TFC100 |
(TF1, TF0, TF0, TF14, TF1) |
|
DL_TFC101 |
(TF2, TF1, TF1, TF14, TF1) |
|
DL_TFC102 |
(TF0, TF0, TF0, TF15, TF1) |
|
DL_TFC103 |
(TF1, TF0, TF0, TF15, TF1) |
|
DL_TFC104 |
(TF2, TF1, TF1, TF15, TF1) |
|
DL_TFC105 |
(TF0, TF0, TF0, TF16, TF1) |
|
DL_TFC106 |
(TF1, TF0, TF0, TF16, TF1) |
|
DL_TFC107 |
(TF2, TF1, TF1, TF16, TF1) |
|
DL_TFC108 |
(TF0, TF0, TF0, TF17, TF1) |
|
DL_TFC109 |
(TF1, TF0, TF0, TF17, TF1) |
|
DL_TFC110 |
(TF2, TF1, TF1, TF17, TF1) |
|
DL_TFC111 |
(TF0, TF0, TF0, TF18, TF1) |
|
DL_TFC112 |
(TF1, TF0, TF0, TF18, TF1) |
|
DL_TFC113 |
(TF2, TF1, TF1, TF18, TF1) |
Sub-tests:
|
Sub-test |
Downlink TFCS under test |
Uplink TFCS Under test |
Implicitly tested |
Restricted UL TFCIs (note 1) |
UL RLC SDU size (bits) (note 2) |
Test data size (bits) (note 2) |
|---|---|---|---|---|---|---|
|
1 |
DL_TFC1, DL_TFC58 |
UL_TFC1, UL_TFC16 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC16 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: 39 RB6: No data RB7: No data RB8: No data |
|
2 |
DL_TFC2, DL_TFC59 |
UL_TFC2, UL_TFC17 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC17 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8: No data |
|
3 |
DL_TFC3, DL_TFC60 |
UL_TFC3, UL_TFC18 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC15, UL_TFC18 |
RB5: 39 RB6: 103 RB7: 60 RB8: 312 |
RB5: No data RB6: No data RB7: No data RB8: 632 |
|
4 |
DL_TFC4, DL_TFC61 |
UL_TFC4, UL_TFC19 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC4, UL_TFC15, UL_TFC16, UL_TFC18 UL_TFC19 |
RB5: 39 RB6: 103 RB7: 60 RB8: 312 |
RB5: 39 RB6: No data RB7: No data RB8: 632 |
|
5 |
DL_TFC5, DL_TFC62 |
UL_TFC5, UL_TFC20 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC5, UL_TFC15, UL_TFC17, UL_TFC18, UL_TFC20 |
RB5: 81 RB6: 103 RB7: 60 RB8: 312 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
|
6 |
DL_TFC6, DL_TFC63 |
UL_TFC6, UL_TFC21 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC15, UL_TFC21 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: No data RB6: No data RB7: No data RB8: 1272 |
|
7 |
DL_TFC7, DL_TFC64 |
UL_TFC7, UL_TFC22 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC7, UL_TFC15, UL_TFC16, UL_TFC21, UL_TFC22 |
RB5: 39 RB6: 103 RB7: 60 RB8: 632 |
RB5: 39 RB6: No data RB7: No data RB8: 1272 |
|
8 |
DL_TFC8, DL_TFC65 |
UL_TFC8, UL_TFC23 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC6, UL_TFC8, UL_TFC15, UL_TFC17, UL_TFC21, UL_TFC23 |
RB5: 81 RB6: 103 RB7: 60 RB8: 632 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 |
|
9 |
DL_TFC9, DL_TFC66 |
UL_TFC9, UL_TFC24 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9, UL_TFC15, UL_TFC24 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 |
RB5: No data RB6: No data RB7: No data RB8: 2552 |
|
10 |
DL_TFC10, DL_TFC67 |
UL_TFC10, UL_TFC25 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9, UL_TFC10, UL_TFC15, UL_TFC16, UL_TFC24, UL_TFC25 |
RB5: 39 RB6: 103 RB7: 60 RB8: 1272 |
RB5: 39 RB6: No data RB7: No data RB8: 2552 |
|
11 |
DL_TFC11, DL_TFC68 |
UL_TFC11, UL_TFC26 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC9 UL_TFC11, UL_TFC15, UL_TFC17, UL_TFC24, UL_TFC26 |
RB5: 81 RB6: 103 RB7: 60 RB8: 1272 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
|
12 |
DL_TFC12, DL_TFC69 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 5112 |
|
13 |
DL_TFC13, DL_TFC70 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 5112 |
|
14 |
DL_TFC14, DL_TFC71 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 5112 |
|
15 |
DL_TFC15, DL_TFC72 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 7672 |
|
16 |
DL_TFC16, DL_TFC73 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 7672 |
|
17 |
DL_TFC17, DL_TFC74 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27 UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 7672 |
|
18 |
DL_TFC18, DL_TFC75 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 10232 |
|
19 |
DL_TFC19, DL_TFC76 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 10232 |
|
20 |
DL_TFC20, DL_TFC77 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 10232 |
|
21 |
DL_TFC21, DL_TFC78 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 12792 |
|
22 |
DL_TFC22, DL_TFC79 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 12792 |
|
23 |
DL_TFC23, DL_TFC80 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 12792 |
|
24 |
DL_TFC24, DL_TFC81 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 15352 |
|
25 |
DL_TFC25, DL_TFC82 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 15352 |
|
26 |
DL_TFC26, DL_TFC83 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 15352 |
|
27 |
DL_TFC27, DL_TFC84 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 17912 |
|
28 |
DL_TFC28, DL_TFC85 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 17912 |
|
29 |
DL_TFC29, DL_TFC86 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 17912 |
|
30 |
DL_TFC30, DL_TFC87 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 20472 |
|
31 |
DL_TFC31, DL_TFC88 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 20472 |
|
32 |
DL_TFC32, DL_TFC89 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 20472 |
|
33 |
DL_TFC33, DL_TFC90 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 23032 |
|
34 |
DL_TFC34, DL_TFC91 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 23032 |
|
35 |
DL_TFC35, DL_TFC92 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 23032 |
|
36 |
DL_TFC36, DL_TFC93 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 25592 |
|
37 |
DL_TFC37, DL_TFC94 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 25592 |
|
38 |
DL_TFC38, DL_TFC95 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 25592 |
|
39 |
DL_TFC39, DL_TFC96 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 28152 |
|
40 |
DL_TFC40, DL_TFC97 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 28152 |
|
41 |
DL_TFC41, DL_TFC98 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 28152 |
|
42 |
DL_TFC42, DL_TFC99 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 30712 |
|
43 |
DL_TFC43, DL_TFC100 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 30712 |
|
44 |
DL_TFC44, DL_TFC101 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 30712 |
|
45 |
DL_TFC45, DL_TFC102 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 33272 |
|
46 |
DL_TFC46, DL_TFC103 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 33272 |
|
47 |
DL_TFC47, DL_TFC104 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 33272 |
|
48 |
DL_TFC48, DL_TFC105 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 35832 |
|
49 |
DL_TFC49, DL_TFC106 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 35832 |
|
50 |
DL_TFC50, DL_TFC107 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 35832 |
|
51 |
DL_TFC51, DL_TFC108 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 38392 |
|
52 |
DL_TFC52, DL_TFC109 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 38392 |
|
53 |
DL_TFC53, DL_TFC110 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 38392 |
|
54 |
DL_TFC54, DL_TFC111 |
UL_TFC12, UL_TFC27 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC15, UL_TFC27 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: No data RB6: No data RB7: No data RB8: 40952 |
|
55 |
DL_TFC55, DL_TFC112 |
UL_TFC13, UL_TFC28 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC13, UL_TFC15, UL_TFC16, UL_TFC27, UL_TFC28 |
RB5: 39 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 39 RB6: No data RB7: No data RB8: 40952 |
|
56 |
DL_TFC56, DL_TFC113 |
UL_TFC14, UL_TFC29 |
DL_TFC0, DL_TFC57, UL_TFC0, UL_TFC15 |
UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3, UL_TFC12, UL_TFC14, UL_TFC15, UL_TFC17, UL_TFC27, UL_TFC29 |
RB5: 81 RB6: 103 RB7: 60 RB8: 2552 |
RB5: 81 RB6: 103 RB7: 60 RB8: 40952 |
|
NOTE 1: UL_TFC0, UL_TFC1, UL_TFC2, UL_TFC3 and UL_TFC15 are part of minimum set of TFCIs. NOTE 2: See TS 34.109 [10] clause 5.3.2.6.2 for details regarding loopback of RLC SDUs. |
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14.2.44.2.4 Test requirements
See 14.1.2 for definition of step 10 and step 15.
1. At step 10 the UE shall send RADIO BEARER SETUP COMPLETE.
2. At step 15a and 15b the UE transmitted transport format shall be within the set of restricted TFCIs as specified for the actual sub-test.
3. At step 15 the UE shall return
– for sub-test 1: RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6, RB7 and RB8.
– for sub-test 2: RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS; and no data shall be received on RB8.
– for sub-test 3: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 4: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 5: RLC SDUs on RB8 having the content equal to the first 312 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 6: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 7: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 8: RLC SDUs on RB8 having the content equal to the first 632 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 9: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 10: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 11: RLC SDUs on RB8 having the content equal to the first 1272 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 12: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 13: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 14: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 15: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 16: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 17: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 18: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 19: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 20: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 21: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 22: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 23: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 24: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 25: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 26: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 27: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 28: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 29: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 30: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 31: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 32: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 33: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 34: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 35: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 36: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 37: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 38: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 39: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 40: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 41: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 42: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 43: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 44: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 45: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 46: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 47: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 48: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 49: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 50: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 51: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 52: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 53: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
– for sub-test 54: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; and no data shall be received on RB5, RB6 and RB7.
– for sub-test 55: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5 having the same content as sent by SS; and no data shall be received on RB6 and RB7.
– for sub-test 56: RLC SDUs on RB8 having the content equal to the first 2552 bits of the test data sent by the SS in downlink; RLC SDUs on RB5, RB6 and RB7 having the same content as sent by SS.
4. At step 15b the UE shall send at least one MEASUREMENT REPORT message.