5 Functional description of the IVS data modem
26.2673GPPeCall data transferGeneral descriptionIn-band modem solutionRelease 17TS
This clause describes the different functions of the IVS data modem.
5.1 IVS transmitter
The IVS transmitter modulates the MSD data to generate signals suitable for transmission over the in-band voice channel to the PSAP. The different blocks of the IVS transmitter are shown in Figure 5.
Figure 5: IVS transmitter block diagram
5.1.1 MSD Message
The MSD is represented by a field of 140 bytes (1 120 bits).
The MSD is denoted .
5.1.2 CRC code
Each MSD message is appended by a field of 28 bit CRC code prior to HARQ FEC encoding.
The entire MSD of length K = 1120 bits is used to calculate the CRC parity bits. The length of the CRC protected code word is N = 1148. Then N K = 28 denotes the degree of the generator polynomial.
The parity bits are generated by the following cyclic generator polynomial:
Denote the bits in the MSD by and the parity bits by .
The encoding is performed in a systematic form, which means that in GF(2), the polynomial
yields a remainder equal to 0 when divided by gCRC28(D).
5.1.3 HARQ FEC encoder
HARQ FEC encoding includes bit scrambling, turbo coding, and the HARQ scheme.
5.1.3.1 Bit scrambling
Bit scrambling is applied to the CRC appended MSD prior to turbo encoding:
XOR
Where is the MSD and CRC bitstream, and is the scrambling sequence.
5.1.3.2 Turbo Coding
The native scheme of the deployed Turbo encoder is a Parallel Concatenated Convolutional Code (PCCC) with two identical 8-state constituent encoders with the polynominal
g0(D)=g1(D) = 1 + D2 + D3,
and one Turbo code internal interleaver. The resulting coding rate of the Turbo coder is r = 1/3. The structure of the Turbo coder is illustrated in Figure 6. The initial value of the shift registers of the 8-state constituent encoders are set to zeros prior to encoding the MSD. The bits output from the Turbo code internal interleaver are to be input to the second 8-state constituent encoder.
Figure 6: Structure of a rate 1/3 Turbo coder (*1: dotted lines apply for trellis termination only)
Trellis termination is performed by taking the tail bits from the shift register feedback after all information bits are encoded. Tail bits are padded after the encoding of information bits. The first three tail bits are used to terminate the first constituent encoder (upper switch in Figure 6 in lower position) while the second constituent encoder is disabled. The last three tail bits are used to terminate the second constituent encoder (lower switch in Figure 6 in lower position) while the first constituent encoder is disabled.
The Turbo code internal interleaver consists of bits-input to a rectangular matrix with padding, intra-row and inter-row permutations of the rectangular matrix, and bits-output from the rectangular matrix with pruning [2].
The parity blocks are generated with the same convolutional encoder, and 3 tail bits are generated from the FEC encoder states [2].
The encoder outputs are collected in the channel coded bit buffer according to Figure 7.
Figure 7: Channel coded bit buffer
5.1.3.3 HARQ for MSD messages
The applied HARQ scheme can create eight different redundancy versions (RV), rv0 … rv7, from the channel coded bit buffer. Each one of the RV consists of a subset of 1380 bits from the channel coded bit buffer. rv0, rv2, rv4, and rv6 contain the entire MSD+CRC part of the channel coded bit buffer. The maximum code rate of the coding scheme is reff ≈ 0.83 since the MSD and CRC are 1148 bit altogether. The redundancy is increased with every further transmission of RVs.
The generation of different redundancy versions of the MSD from the above FEC encoded bitstream is defined in ROM tables and can be found in 3GPP TS 26.268 [2].
5.1.4 Modulation
The encoded binary data stream bits are grouped into symbols. Each symbol carries 3 bits of information and modulates one basic uplink waveform which corresponds to one modulation frame.
There are two modulator modes, a fast modulator mode and a robust modulator mode. Under normal conditions, a transmission is successful when applying the fast modulator mode. The robust modulator mode serves as a back up solution if a transmission fails in unusually difficult environments. The modulator modes merely differ by symbol duration, i.e., the length of the modulation frames, which is 2 ms for the fast modulator mode and 4 ms for the robust modulator mode. In terms of samples this is 16 samples for the fast modulator mode and 32 samples for the robust modulator mode at 8 kHz sampling rate. Therefore, a speech frame accommodates 10 modulation frames (containing 10 symbols, or 30 bit) for the fast modulator mode and 5 modulation frames (5 symbols or 15 bit) for the robust modulator mode. Hence, the modulation data rates are 1 500 bit/s and 750 bit/s, respectively, not accounting for muting gaps and synchronization frames.
The uplink waveform is determined by the basic uplink waveform , which is
for the fast modulator mode (n = 0,…,15) and
for the robust modulator mode (n = 0,…,31). These values are given with respect to a signed 16-bit signal representation. The mapping between the symbol and the uplink waveform is given by a cyclic right-shift of k samples, denoted by , and the sign q of the basic uplink waveform . Table 1 details this mapping. Note that the position (cyclic shift) of the waveform carries two bits of information while the sign of the waveform adds another bit of information. Figure 8 illustrates the slot structure of both modulator modes. It represents a particular example symbol sequence in an abstract way by neglecting the actual shape and signs of the waveforms. The large bars indicate the maxima of the basic uplink waveforms according to the example symbols whereas the small ones indicate the other potential maximum positions.
Table 1: Symbol modulation mapping for uplink
|
Symbol |
uplink waveform fast modulator mode wUL(n) = |
uplink waveform robust modulator mode wUL(n) = |
|||
|
sign q |
cyclic shift k |
sign q |
cyclic shift k |
||
|
0 |
000 |
1 |
0 |
1 |
0 |
|
1 |
001 |
1 |
4 |
1 |
8 |
|
2 |
010 |
1 |
8 |
1 |
16 |
|
3 |
011 |
1 |
12 |
1 |
24 |
|
4 |
100 |
-1 |
12 |
-1 |
24 |
|
5 |
101 |
-1 |
8 |
-1 |
16 |
|
6 |
110 |
-1 |
4 |
-1 |
8 |
|
7 |
111 |
-1 |
0 |
-1 |
0 |
Figure 8: Slot structure of uplink modulator
5.1.5 MSD data frame format
Each MSD data frame includes one encoded MSD message with CRC field, split up into multiple data fields.
The MSD data frame forms the largest fraction of uplink data traffic and consists of three data fields, four muting gaps, and three synchronization fragments (see clause 5.1.6), arranged as given in Table 2a.
Table 2a: MSD data frame format
|
Pos. |
Fast modulator mode |
Robust modulator mode |
|
1 |
1 frame of muting, M1 (20 ms) |
1 frame of muting, M1 (20 ms) |
|
2 |
15 frames of modulated data, D1 (300 ms) |
30 frames of modulated data, D1 (600 ms) |
|
3 |
4 frames of sync fragment, S1 (80 ms) |
4 frames of sync fragment, S1 (80 ms) |
|
4 |
2 frames of muting, M2 (40 ms). |
4 frames of muting, M2 (80 ms). |
|
5 |
15 frames of modulated data, D2 (300 ms). |
30 frames of modulated data, D2 (600 ms). |
|
6 |
4 frames of sync fragment, S2 (80 ms) |
4 frames of sync fragment, S2 (80 ms) |
|
7 |
2 frames of muting, M3 (40 ms) |
4 frames of muting, M3 (80 ms) |
|
8 |
16 frames of modulated data, D3 (320 ms) |
32 frames of modulated data, D3 (640 ms) |
|
9 |
4 frames of sync fragment, S3 (80 ms) |
4 frames of sync fragment, S3 (80 ms) |
|
10 |
3 frames of muting, M4 (60 ms) |
3 frames of muting, M4 (60 ms) |
|
Sum |
66 speech frames (1320 ms) |
116 speech frames (2320 ms) |
5.1.6 Synchronization signal and frame format
The synchronization frame consists of the direct concatenation of:
1) the synchronization tone ; and
2) the synchronization preamble . Note that the synchronization preamble is not only used in the synchronization frame, but fragments thereof are also inserted into the MSD data frame for the purpose of synchronization tracking.
The synchronization tone consists of a sampled sinusoidal tone of frequency 500 Hz or 800 Hz, and of 64 ms duration. A frequency of 500 Hz is chosen to indicate that the fast modulator mode is to be applied and a frequency of 800 Hz indicates that the robust modulator mode is used for the subsequent MSD frames.
The synchronization tone is followed by synchronization preamble . The synchronization preamble is a pulse sequence known at the receiver. The pulse sequence for the synchronization preamble has been chosen to optimize autocorrelation properties in order to allow a very reliable detection and delay estimation at the same time. The achieved accuracy of the delay estimation is typically exact by sample.
The basis of the synchronization preamble is a PN sequence of length 15 that takes values of (1, 1, 1, 1, -1, 1, -1, 1, 1, -1, -1, 1, -1, -1, -1). Each pulse has an amplitude of 20000 in a signed 16-bit signal representation. The pulse sequence is composed of 5 periods of this PN sequence. The outer periods (number 1 and 5) are inverted (i.e. all elements are multiplied with -1) and those parts that are common to the inverted and non inverted sequence are transmitted just once, see Figure 9. Figure 10 illustrates the resulting pulse sequence.
Figure 9: Construction of pulse sequence for the sync preamble (+ := +1 and -:= -1)
Figure 10: Pulse sequence for generation of synchronization preamble
In the pulse sequence, neighboring pulses are placed 22 samples apart to form the synchronization preamble, i.e. zero‑padding of 21 zero samples between pulses is applied. In addition, 71 zero samples are placed before the first pulse. The resulting synchronization preamble has a duration of 71 + 69 + (68*21) = 1568 samples, or 196 ms.
Both synchronization tone and synchronization preamble can be stored in a ROM table to avoid computation at runtime. These tables can be found in 3GPP TS 26.268 [2], and they should serve as a reference of the synchronization signal..
The overall length of the synchronization frame is 13 frames or 260 ms.
For the purpose of uplink synchronization tracking, fragments of the synchronization preample are inserted into the MSD data frame (see Table 2a). A synchronization fragment consists of the last 576 samples of the synchronization preamble , prepended by 64 zero-samples. A synchronization fragment is thus 640 samples or 80 ms long.
5.1.7 Multiplexing
The multiplexer combines the synchronization frame and the MSD data frames to the effective transmit signal as in Figure 11.
Figure 11: Uplink data format with multiplexing
5.1.8 Uplink signal and retransmission
The uplink signal starts with a synchronization frame (SF) which is succeeded by one or more MSD redundancy versions, e.g. MSD rv0, MSD rv1, MSD rv2, etc. as shown in Figure 12.
MSD rv0 is the first transmission of a full MSD message. MSD rv1 represents the first retransmission, MSD rv2 the second retransmission, each with a different version of incremental redundancy (IR). Up to eight different versions of incremental redundancy are allowed (MSD rv0 … MSD rv7).
In good channel conditions, the MSD should be successfully decodable after the reception of the first transmission, MSD rv0.
The IVS transmitter stops transmitting when an ACK message is received on the downlink by the IVS receiver.
If, after one full transmission cycle (consisting of 8 RV transmissions), the MSD message is still not received correctly, the PSAP will instruct the IVS to start the MSD transmission cycle again with one synchronization frame and MSD rv0, using the robust modulator mode. The PSAP receiver then resets the IR combining buffer after 8 received MSD messages, switches the demodulation mode, and restarts combining again.
A PSAP may also interrupt an on-going transmission cycle before it has received all 8 RVs due to lost uplink synchronization (see clause 6.2.1). In case of an early re-start due to lost synchronization, it is useful to maintain the fast modulator mode in the next transmission cycle.
In both of the cases described above, the re-start of an MSD transmission is indicated to the IVS by a new sequence of START feedback messages after a number of NACK messages have already been received by the IVS. When restarting the MSD transmission upon a request from the PSAP, the IVS switches from fast to robust modulator mode if the total number of received NACK feedback messages (since the last modem reset) is at least 10.
Figure 12: Uplink signal format
The generation of different redundancy versions of the MSD is defined in ROM tables and can be found in 3GPP TS 26.268 [2].
5.1.9 Additional signal format for push mode
If the IVS is to issue the request for MSD transmission, it reuses the downlink signal format according to clause 6.1. The message used for the data part is reproduced in Table 2b. The modulated data may be precomputed and stored in the IVS ROM. Several such messages are transmitted before an IVS state change triggers the MSD transmission, or a timeout occurs.
Table 2b: Uplink push message encoding
|
Message |
Binary representation |
BCH encoder output, bi (hexadecimal)* |
|
push (IVS initiation message) |
0011 |
DBE 9397 9461 07EA |
*: see clause 6.1 for encoding scheme
5.2 IVS receiver
The IVS receiver demodulates and decodes feedback messages (START, NACK, link-layer ACK, and higher-layer ACK) from the PSAP. It starts the IVS transmitter after detecting a request message (the START trigger) for MSD data transmission on the downlink. The different blocks of the IVS receiver are shown in Figure 13.
Figure 13: IVS receiver block diagram
5.2.1 Synchronization detector/tracker
For support of the synchronization/detection function, each synchronization frame includes two parts, which are denoted as synchronization tone and synchronization preamble as described in clause 5.1.6.
NOTE: The downlink synchronization frame is identical to the uplink synchronization frame (except that the downlink only uses a frequency of 500 Hz for the synchronization tone), however, the data frame formats are different in uplink and downlink.
The synchronization detector/tracker has three main functions:
1) Scan the input signal and identify the start of an eCall data transmission. The result of this operation is a synchronization detection flag which indicates whether or not eCall data transmission has been detected.
2) Determine the timing of the data frame. The result of this operation is timing information from which the location of the data burst in the input signal can be calculated at sample resolution.
3) Continuously check and track the data frame timing. Based on the subsequently received synchronization frames, the validity of the data frame timing is checked. In case the check fails, the synchronization tracker tries to identify a new valid data frame timing.
To avoid false detection of an eCall data transmission in the IVS receiver, the synchronization detector evaluates three consecutive sync frames. It sets the detection flag DF = 1, only if the same timing information is detected in three successively detected sync preambles. This feature is also required to prevent misdetection of the START message and to keep the synchronization failure rate at virtually zero.
The synchronization preamble sequence in Figure 10 is constructed to have good autocorrelation properties for optimal detection as shown in Figure 14.
Figure 14: Autocorrelation properties of pulse sequence of Figure 10
The synchronization algorithm acquires the delay value by checking the correctness of the distance between the five correlation peaks. A preamble is considered detected if either the pair of peaks (2, 4) or the pair of peaks (1, 5) exhibit correct distances from each other, provided that they either fulfil certain amplitude constraints (the amplitude differences shall not differ by more than a factor of 3 and their average shall not be less than half of the global maximal sync filter output since first activation of the synchronization detector), or one additional peak is identified.
To distinguish between higher-layer ACK message and link-layer ACK messages on the downlink, an inverted sync pulse sequence precedes the higher-layer ACK messages. The synchronization detector determines the signs of the autocorrelation pulses independently from the absolute peak values and peak distances. The correlation peak signs are used to determine whether the incoming feedback message is a link-layer ACK or higher-layer ACK message. If an inverted sign of autocorrelation pulses is detected right from the beginning of uplink and/or downlink transmissions, the synchronization detector assumes that a signal inversion is occurring on the transmission path. In this case, all received PCM samples are multiplied by -1 on the affected link for the remainder of the MSD transmission.
Because feedback messages are transmitted continuously on the downlink, it is usually sufficient for the IVS receiver to perform the synchronization only once per MSD. This means, synchronization can be locked once an eCall data transmission has been detected and the timing information has been computed. Nevertheless, there exist rare scenarios that may require a resynchronization due to lost synchronization, e.g. because of an adaptive jitter buffer, or an analog PSTN line with sampling clocks drifting between transmitter and receiver. Therefore, the correctness of the synchronization is checked continuously (referred to as ‘Sync Check’) by evaluating the existence of correlation peaks at the expected peak positions for any of the feedback messages. The data part of a message is ignored if none of the five peaks is detected.
A sync tracking feature is also implemented which re-uses the original synchronization algorithm and evaluates the cross-correlations of the incoming signal and the known synchronization sequence in a certain interval around the previously expected delay position . The width of this serach interval can be set as a parameter of the synchronization function, with a maximum value of +/– 480 samples in the IVS sync tracker. Note that the cross-correlation search can be efficiently implemented by FIR filtering.
If no valid delay position can be identified 8 times in a row, the IVS resets itself.
5.2.2 Timing Unit
The timing unit adjusts the timing of the received signal for the following processing stages according to the timing information obtained by the synchronization detector/tracker.
5.2.3 De-multiplexing
The de-multiplexer removes the muting and synchronization signals from the input data stream.
5.2.4 Data demodulation and FEC decoding
The data demodulator and decoder on the downlink are represented by a single correlator matched directly to the modulated downlink waveforms. The received waveform is correlated to each of the stored waveforms and a maximum likelihood decision on the feedback message, msg, is made.
Since only a very small number of different data messages (see Table 3) is used on the downlink, the entire expected signal patterns can be stored at the IVS receiver. These patterns have a length of 480 samples each (corresponding to 60 ms, which is the length of modulated feedback messages). In the demodulator/decoder the cross-correlation between the received signal and the stored pattern for each possible transmit message is calculated, and a decision for a message is made according to individual correlation thresholds. If synchronization has detected a message, but the demodulator threshold is not reached for either of the valid messages, the message is marked as unreliable and ignored in the case of lower-layer ACK or NACK. In case of START, the first six unreliable messages are ignored, but subsequent unreliable messages are not distinguished from reliable ones any more. For higher-layer ACK, unreliable messages contribute with a lower weight to the detection decision. The compressed higher-layer ACK is considered as successfully received if three consecutive messages (irrespective of reliability), or two reliable, consecutive messages, are detected with identical data.
5.2.5 Message handler
This function activates the appropriate functions in the IVS modem according to the message received. After synchronization is locked, the IVS transmitter is activated to send MSD data to the PSAP once a START message has been received. During an ongoing transmission, a sequence of least 3 reliable START messages is required to restart the MSD transmission from the IVS to the PSAP. As long as only NACKs are received, MSD transmission continues with incremental redundancy. A successfully received link-layer ACK or a higher-layer ACK simply instruct the IVS transmitter to stop transmission. Also, if the Sync Check fails to track the preamble, the IVS transmitter is reset to idle state.