6.8 Spreading modulation for the 3.84 Mcps MBSFN IMB option

25.2233GPPRelease 17Spreading and modulation (TDD)TS

6.8.1 Spreading

The spreading operation includes a modulation mapper stage successively followed by a channelisation stage, an IQ combining stage and a scrambling stage as illustrated by figure 9.

Modulation mapping is described in subclause 5.2.3.

For all physical channels, except for the Synchronisation Channel (SCH), the I and Q branches shall be spread to the chip rate by the same real-valued channelisation code C_ch,SF,m, i.e. the output for each input symbol on the I and the Q branches shall be a sequence of SF chips corresponding to the channelisation code chip sequence multiplied by the real-valued symbol. The channelisation code sequence shall be aligned in time with the symbol boundary. The real-valued chip sequence on the Q-branch shall be complex multiplied with j and summed with the corresponding real-valued chip sequence on the I-branch, resulting in a single complex-valued chip sequence I+jQ.

The sequence of complex-valued chips output from the spreading stage shall be scrambled (complex chip-wise multiplication) by a complex-valued scrambling code S_dl,n.

Figure 9: Spreading for all downlink physical channels except SCH

All complex-valued spread channels are separately weighted and then combined, together with separately weighted Primary SCH and Secondary SCH, into one complex-valued chip sequence by using complex addition, as illustrated by figure 9 in subclause 5.1.5 of [4]. The resulting signal is modulated prior to transmission as described in subclause 6A.3.

6.8.2 Code generation and allocation

6.8.2.1 Channelisation codes

The channelisation codes are OVFS codes that preserve the orthogonality between downlink channels of different rates and spreading factors. The channelisation codes are defined in figure 4 of subclause 4.3.1.1 of [3] and are uniquely described as C_ch,SF,m, where SF is the spreading factor of the code and m is the code number, 0  m  SF-1.

The following applies to the MBSFN IMB physical channels:

– The channelisation code for the Primary CPICH is fixed to C_ch,256,0 ;

– The channelisation code for the Primary CCPCH is fixed to C_{ch,256,1 ;}

– The channelisation codes for the Secondary CCPCH frame type 1 and MICH are assigned by UTRAN from the codes C_ch,256,m ;

– The channelisation codes for the Secondary CCPCH frame type 2 are assigned by UTRAN from the codes C_ch,16,m ;

– The channelisation codes for the T-CPICH are C_ch,16,1 , C_ch,16,2 , …, C_ch,16,15.

6.8.2.2 Scrambling codes

The scrambling codes shall be generated as described in subclause 5.2.2 in [4]. For MBSFN IMB operation, only primary scrambling codes shall be used. Out of all possible primary scrambling codes with index n=16*i where i=0…511 as defined in [4] the following subset shall be supported for the MBSFN option: . No two members of set n belong to the same scrambling code group.

Cells that belong to a certain MBSFN IMB cluster shall use the same primary scrambling code.

The primary scrambling code for all physical channels shall be applied aligned with the start of the Primary CCPCH frame. This also applies in the case of a Secondary CCPCH frame type 2 associated with the k^th sub-frame of a radio frame (k = 0,1,…4) [7], such that the start of the scrambling code is always aligned with the start of sub-frame k = 0.

6.8.3 Modulation

Modulation of the complex-valued chip sequence generated by the spreading process is performed according to sub-clause 6.6. The modulation chip rate is 3.84 Mcps.